(3) 1/4 duty (1/2 bias)
VDD
3V
V3
V2
VA
1.5V
V1
VB
VSS
V3
COM0
V1
Vss
COM1
V3
V1
Vss
COM2
V3
V1
Vss
V3
COM3
V1
Vss
SEG0
V3
V1
Vss
SEG0-COM0
V3
V1
ON
Vss
-V1
-V3
SEG0-COM1
V3
V1
OFF
Vss
-V1
Frame
-V3
RESETTING FUNCTION
EM73469A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
Preliminary
(4) 1/3 duty (1/2 bias)
VDD
3V
V3
V2
VA
1.5V
V1
VB
VSS
V3
V1
Vss
V3
V1
Vss
V3
V1
Vss
(5) 1/2 duty (1/2 bias)
VDD
3V
V3
V2
VA
1.5V
V1
VB
VSS
V3
V1
Vss
V3
V1
Vss
(6) static
VDD
3V
V3
V2
VA
1.5V
V1
VB
VSS
V3
Vss
V3
V1
Vss
V3
V1
Vss
-V1
-V3
V3
V1
Vss
-V1
Frame
-V3
V3
V1
Vss
V3
V1
Vss
-V1
-V3
V3
V1
Vss
-V1
-V3
Frame
ON OFF
V3
V1
Vss
Frame
V3
Vss
-V3
V3
Vss
-V3
When CPU in normal working condition and RESET pin holds in low level for three instruction cycles at least,
then CPU begins to initialize the whole internal states, and when RESET pin changes to high level, CPU begins
to work in normal condition.
The CPU internal state during reset condition is as following table :
Hardware condition in RESET state
Program counter
Status flag
Interrupt enable flip-flop ( EI )
MASK0 ,1, 2, 3
Interrupt latch ( IL )
P10, 11,14, 16, 19, 25, 27, 28, 29, 31
P4, 8, 23, 24
Both oscillator
Initial value
0000h
01h
00h
00h
00h
00h
0Fh
Start oscillation
The RESET pin is a hysteresis input pin and it has a pull-up resistor available by mask option.
The simplest RESET circuit is connect RESET pin with a capacitor to VSS and a diode to VDD.
RESET
* This specification are subject to be changed without notice.
1.9.2001 21