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MAX791E
(Rev.:1995)

Microprocessor Supervisory Circuit

Maxim Integrated 

Microprocessor Supervisory Circuit

FROM

REGULATED

SUPPLY

0.1µF

3 VCC

VOUT 2

MAX791

VBATT 1

0.1µF

µP POWER

POWER TO

CMOS RAM

µP

3.0V

RESET 15

LOWLINE 10

WDI 11

RESET

NMI

I/O LINE

GND

a)

4

VOLTAGE

REGULATOR

3 VCC

VOUT 2

0.1

µF

MAX791

VBATT 1

0.1µF

µP POWER

POWER TO

CMOS RAM

µP

3.0V

7 PFI

RESET 15

PFO 6

WDI 11

GND

4

RESET

NMI

I/O LINE

b)

Figure 9. a) If the unregulated supply is inaccessible,

LOWLINE generates the NMI for the µP. b) Use PFO to gener-

ate the µP NMI if the unregulated supply is inaccessible.

Power-Fail Comparator

The power-fail comparator is an uncommitted compara-

tor that has no effect on the other functions of the IC.

Common uses include monitoring supplies other than

5V (see the Typical Operating Circuit and the

Monitoring a Negative Voltage section) and early

power-fail detection when the unregulated power is

easily accessible (Figure 9b).

Power-Fail Input

PFI is the input to the power-fail comparator. PFI has a

guaranteed input leakage of ±25nA max over tempera-

ture. The typical comparator delay is 15µs from VIL to

VOL (power failing), and 55µs from VIH to VOH (power

being restored). If unused, connect this input to

ground.

Table 1. Input and Output States in

Battery-Backup Mode

PIN

NAME

STATUS

1

VBATT Supply current is 1µA maximum.

2

VOUT

VOUT is connected to VBATT through

an internal PMOS switch.

3

VCC

Battery-switchover comparator

monitors VCC for active switchover.

4

GND

GND—0V reference for all signals.

5

BATT ON

Logic high. The open-circuit output is

equal to VOUT.

The power-fail comparator remains

6

–——–

PFO

active in the battery-backup mode for

VCC ≥ VB–—A—T–T - 1.2V typ. Below this

voltage, PFO is forced low.

The power-fail comparator remains

7

PFI

active in the battery-backup mode for

VCC ≥ VBATT - 1.2V typ.

8

SWT

SWT is ignored.

9

–M—R–

M–—R– is ignored.

–——————–

10 LOWLINE Logic low*

11

WDI

WDI is ignored, and goes high

impedance.

12

–—–

CE OUT

Logic high. The open-circuit output

voltage is equal to VOUT.

–—–

13

CE IN High impedance

14

–——–

WDO

Logic high. The open-circuit output

voltage is equal to VOUT.

–————–

15

RESET Logic low*

16

–———–

WDPO

Logic high. The open-circuit output

voltage is equal to VOUT.

* VCC must be below the reset threshold to enter battery-

backup mode.

Power-Fail Output

The Power-Fail Output (PFO) goes low when PFI goes

below 1.25V. It typically sinks 3.2mA with a saturation

voltage of 0.1V. With PFI above 1.25V, PFO is actively

pulled to VOUT. Connecting PFI through a voltage

divider to an unregulated supply allows PFO to gener-

ate an NMI as the unregulated power begins to fall

(Figure 9b). If the unregulated supply is inaccessible,

use LOWLINE to generate the NMI. The LOWLINE

threshold is typically 150mV above the reset threshold

(see LOWLINE Output section).

12 ______________________________________________________________________________________

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