TSL25717 查看數據表（PDF） - austriamicrosystems AG
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TSL25717 Datasheet PDF : 25 Pages
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TSL2571
LIGHT-TO-DIGITAL CONVERTER
TAOS117A − FEBRUARY 2011
Persistence Register (0x0C)
The persistence register controls the filtering interrupt capabilities of the device. Configurable filtering is
provided to allow interrupts to be generated after each ADC integration cycle or if the ADC integration has
produced a result that is outside of the values specified by threshold register for some specified amount of time.
ALS interrupts are generated using C0DATA.
Table 7. Persistence Register
lid PERS
FIELD
Reserved
amsoAnGtent still va APERS
7
BITS
7:4
3:0
6
5
4
3
2
1
0
Reserved
APERS
Address
0x0C
DESCRIPTION
Reserved
Interrupt persistence. Controls rate of interrupt to the host processor.
FIELD VALUE MEANING
INTERRUPT PERSISTENCE FUNCTION
0000
Every Every ALS cycle generates an interrupt
0001
1
1 value outside of threshold range
0010
2
2 consecutive values out of range
0011
3
3 consecutive values out of range
0100
5
5 consecutive values out of range
0101
10
10 consecutive values out of range
0110
15
15 consecutive values out of range
0111
20
20 consecutive values out of range
1000
25
25 consecutive values out of range
1001
30
30 consecutive values out of range
1010
35
35 consecutive values out of range
1011
40
40 consecutive values out of range
1100
45
45 consecutive values out of range
1101
50
50 consecutive values out of range
1110
55
55 consecutive values out of range
1111
60
60 consecutive values out of range
l c Configuration Register (0x0D)
a The configuration register sets the wait long time.
icTable 8. Configuration Register
n CONFIG
h FIELD
c Reserved
WLONG
Te Reserved
7
BITS
7:2
1
0
6
5
4
3
2
1
0
Reserved
WLONG
Address
Reserved 0x0D
DESCRIPTION
Reserved. Write as 0.
Wait Long. When asserted, the wait cycles are increased by a factor 12× from that programmed in the
WTIME register.
Reserved. Write as 0.
Copyright E 2011, TAOS Inc.
16
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