8189ETVRTL8189ETV 查看數據表（PDF） - Realtek Semiconductor

零件编号

产品描述 (功能)

生产厂家

8189ETVRTL8189ETV

SINGLE-CHIP IEEE 802.11b/g/n 1T1R WLAN With SDIO INTERFACE

Realtek Semiconductor 

3.3V

SPI_CLK

SPI_MISO

SPI_MOSI

SPI_SCSn

T33Ramp

formal power up

2.7V

write register SPI_CFG

write cmd+data

status

read cmd

s tatus +data

Tnon_rdy

8189ETVRTL8189ETV

Datasheet

write cmd+data

status

Variable definition:

T33ramp: The 3.3V main power ramp up duration

Tnon_rdy: The duration SPI device internal initialization. After Tnon_rdy, SPI host can then send command to

write SPI_CFG register. SPI_CFG register is to control SPI endian and word length.

The power on flow description:

The ramp up time is specified by T33ramp duration.

After main 3.3V ramp up, the power management unit will be enabled by power ready detection circuit, and

enables SPI block. Efuse is then autoloaded to SPI circuits, and the internal power circuits are configured

during Tnon_rdy duration.

The typical timing spec is shown as follows:

T33ramp

Tnon-rdy

Table 15. SPI Interface Power On Timing Parameters

Min

Typical

Max

0.1

0.5

2.5

3

4

18

Unit

ms

ms

Single-Chip IEEE 802.11b/g/n 1T1R WLAN Controller 16

with SDIO Interface

Track ID: JATR-2265-11 Rev. 0.7

Share Link: