74HC273 查看數據表（PDF） - System Logic Semiconductor
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74HC273 Datasheet PDF : 5 Pages
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SL74HC273
AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)
Symbol
Parameter
VCC
Guaranteed Limit
V 25 °C to ≤85°C ≤125°C Unit
-55°C
fmax Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
2.0 6.0
5.0
4.0 MHz
4.5 30
24
20
6.0 35
28
24
tPLH, tPHL Maximum Propagation Delay, Clock to Q (Figures 2.0 145
180
220
ns
1 and 4)
4.5 29
36
44
6.0 25
31
38
tPHL Maximum Propagation Delay , Reset to Q (Figures 2.0 145
180
220
ns
2 and 4)
4.5 29
36
44
6.0 25
31
38
tTLH, tTHL Maximum Output Transition Time, Any Output
2.0 75
95
110
ns
(Figures 1 and 4)
4.5 15
19
22
6.0 13
16
19
CIN
Maximum Input Capacitance
-
10
10
10
pF
Power Dissipation Capacitance (Per Enabled
Output)
CPD Used to determine the no-load dynamic power
consumption: PD=CPDVCC2f+ICCVCC
Typical @25°C,VCC=5.0 V
48
TIMING REQUIREMENTS (CL=50pF,Input tr=tf=6.0 ns)
VCC
Symbol
Parameter
V
tSU
Minimum Setup Time, Data to 2.0
Clock (Figure 3)
4.5
6.0
th
Minimum Hold Time, Clock to 2.0
Data (Figure 3)
4.5
6.0
trec
Minimum Recovery Time,
2.0
Reset Inactive to Clock (Figure 4.5
2)
6.0
tw
Minimum Pulse Width, Clock
2.0
(Figure 1)
4.5
6.0
tw
Minimum Pulse Width, Reset
2.0
(Figure 2)
4.5
6.0
tr, tf Maximum Input Rise and Fall
2.0
Times (Figure 1)
4.5
6.0
Guaranteed Limit
25 °C to-55°C
≤85°C
60
75
12
15
10
13
3.0
3.0
3.0
3.0
3.0
3.0
5.0
5.0
5.0
5.0
5.0
5.0
60
75
12
15
10
13
60
75
12
15
10
13
1000
1000
500
500
400
400
≤125°C
90
18
15
3.0
3.0
3.0
5.0
5.0
5.0
90
18
15
90
18
15
1000
500
400
pF
Unit
ns
ns
ns
ns
ns
ns
SLS
System Logic
Semiconductor
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