Silan
Semiconductors
SC9257
Following is a typical lock detection operation. It shows the operation flow from locked state to frequency change
with a phase error greater than ±6.05µs.
Frequency change
WAIT
Phase error detection start
Reset bit 1
WAIT
Time interval exceeding that of
reference frequcncy cycle
ENABLE=1?
YES
UNLOCK bit =0?
NO
NO (UNLOCK)
YES (Lock)
Check phase error
detection bits PE1,PE2
and PE3
NO
PE1=1,PE2=0,PE3=1?
YES
Phase error=greater than f4.95s
and less than f6.05s
Fig.11
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
REV: 1.0
23
2001.10.18