WM8181
Advanced Information
MCLK
VSMP
DOUT
64 MCLK Rising Edges
tPZD
DON'T CARE
tPZE
tPD
Hi-Z
Hi-Z
Figure 2 Power Down/Power Up
TEST CHARACTERISTICS
AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, TA = 0 to 70°C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
VSMP to DOUT enabled
tPZE
10
VSMP to DOUT enabled
tPZE
AVDD = DVDD = 3.3V
10
MCLK to DOUT disabled
tPZD
10
MCLK to DOUT disabled
tPZD
AVDD = DVDD = 3.3V
10
MCLK to DOUT
tPD
10
propagation delay
MCLK to DOUT
propagation delay
tPD
AVDD = DVDD = 3.3V
15
Note: Parameters are measured at 50% of the rising/falling edge.
UNIT
ns
ns
ns
ns
ns
ns
MCLK
VSMP
INPUT
VIDEO
(CCD)
VIDEO
(CIS)
tVSU
tVH
Figure 3 Input Video Timing
TEST CHARACTERISTICS
AVDD = DVDD = 2.97 to 3.63V and 4.5 to 5.5V, AGND1 = AGND2 = DGND = 0V, TA = 0 to 70°C, MCLK = 24MHz
unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
Input video set-up time
tVSU
10
Input video hold time
tVH
20
Notes: 1. tVSU and tRSU denote the set-up time required from when the input video signal has settled.
2. Parameters are measured at 50% of the rising/falling edge.
WOLFSON MICROELECTRONICS LTD
MAX
UNIT
ns
ns
AI Rev 3.0 January 2000
6