PI6C106 查看數據表（PDF） - Pericom Semiconductor
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PI6C106 Datasheet PDF : 8 Pages
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PI6C106
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Pin Descriptions
Pin Number Pin Name
Type
Description
1
GND1
PWR Ground for REF output, X1, X2.
2
X1
IN
XTAL_IN 14.318 MHz Crystal input, has internal 33pF load cap and feedback
resistor from X2.
3
X2
OUT XTAL_OUT Crystal outut, has internal load cap 33pF
4
GND2
PWR Ground for PCI outputs
5
PCICLK_E
OUT
Early PCICLK. Leads PCICLK(0:4,_F) by 2ns ±250ps. Not affected by
PCI_STOP#.
6
PCICLK_F
OUT Free Running PCI output. Not affected by PCI_STOP#.
7,8,10,11 PCICLK(0:3)
OUT PCI clock outputs. TTL compatible 3.3V.
9
VDD2
PWR Power for PCICLK outputs, nominally 3.3V.
PCICLK_4
OUT PCI clock output. TTL compatible 3.3V. (1.5X)
12
SEL100/66.6#
IN
Select pin for enabling 100MHz or 66.6 MHz.
H=100 MHz, L=66.6 MHz (PCI always synchronous 33.3 MHz).
13
VDD3
PWR Power for 48 MHz.
14
48 MHz
OUT Fixed CLK output @ 48 MHz.
15
GND3
PWR Ground for 48 MHz.
16
SPREAD#
IN
Turns on Spread Spectrum when active. 0.5% down spread 0.1.
17
PD#
IN
Powers down chip. Internal PLLs, all output are turned off.
18
CPU_STOP#
IN
Halts CPUCLK (2:0) at logic "0" level when input is low.
19
PCI_STOP#
IN
Halts CPUCLK (0:4) at logic "0" level when input is low. Does not affect PCICLK_E
and PCICLK_F
20
GND
PWR Ground for PLL core.
21
VDDLC
PWR Power for CPU outputs, nominally 2.5V
22,23,24 CPUCLK (2:0) OUT CPU and Host clock outputs nominally 2.5V
25
VDDLA
PWR Power for IOAPIC.
26
IOAPIC
OUT IOAPIC clock output 14.318MHz.
27
VDD1
PWR Power for REF outputs.
28
REF0
OUT 14.318 MHz clock output.
Note:
Inactive means outputs are held LOW and are disabled from switching
2
PS8546A 07/13/01
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