MC14568BD 查看數據表（PDF） - Motorola => Freescale
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MC14568BD Datasheet PDF : 12 Pages
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PULSE
GENERATOR 1
PULSE
GENERATOR 2
PULSE
GENERATOR
SWITCHING TIME TEST CIRCUITS AND WAVEFORMS
VDD
10 k
CTL
DP0 PCout
DP1
LD
DP2
CL
DP3
PCin
F Q1/C2
G
C1
“0”
PE
VSS
VDD
A LAGS B, PCout IS LOW.
2 “0”out REF
50%
A LEADS B, PCout IS HIGH.
B
PCin
CL
PG1
A
20 ns
20 ns
tW(PCin)
90%
50%
10%
tPLH
tTHL
tPLH
tPLH
90%
LD
10%
tPHL
tTLH
PCout
THREE–STATE
THREE–STATE
25%
tPHL
Figure 1. Phase Comparator
tPHL
75%
tPLH
VOH
VOL
VDD
CTL
DP0 PCout
DP1
LD
DP2
DP3
PCin
F Q1/C2
G
CL
C1
“0”
PE
20 ns
C1
10%
90%
50%
20 ns
tW(C1)
tPHL
90%
Q1/C2 10% 50%
tTLH tTHL
fin fmax
PULSE
GENERATOR
20 ns
Q1/C2
10%
90%
50%
tPLH
90%
“0”
50%
10%
tTLH
VSS
Figure 2. Counter D1
VDD
DP0
DP1 PCout
DP2
LD
DP3
Q1/C2
PCin
F
G
“0”
C1
CTL
PE
VSS
CL
PULSE
GENERATOR 1
PULSE
GENERATOR 2
VDD
DP0
DP1 PCout
DP2
LD
DP3
Q1/C2
PCin
F
G
“0”
C1
CTL
CL
PE
VSS
N PULSES*
20 ns
tPHL
tW(Q1/C2)
Q1/C2 = PG 1 50%
fin fmax
20 ns
PE = PG2
90%
50%
10%
20 ns
tTHL
a.
tW(PE)
“0”
* N is the value programmed on the DP Inputs.
b.
Figure 3. Counter D2
MC14568B
4
MOTOROLA CMOS LOGIC DATA
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