Philips Semiconductors
12-bit, 3.0 V, 20 Msps analog-to-digital
interface for CCD cameras
Objective specification
TDA9962
SYMBOL
PARAMETER
CONDITIONS
th(IN;SHP)
th(IN;SHD)
CDS input hold time
(pin IN) compared to
control pulse SHP
CDS input hold time
(pin IN) compared to
control pulse SHD
VCCA = VCCD = 3.0 V;
Tamb = 25 °C;
see Figs 3 and 4
VCCA = VCCD = 3.0 V;
Tamb = 25 °C;
see Figs 3 and 4
Amplifier
DRPGA
∆GPGA
PGA dynamic range
PGA gain step
Analog-to-Digital Converter (ADC)
DNL
differential non linearity fpix = 20 MHz; ramp input
Total chain characteristics (CDS + PGA + ADC)
fpix(max)
fpix(min)
tCLKH
tCLKL
td(SHD;CLK)
tsu(BLK;SHD)
Vi(IN)(FS)
maximum pixel frequency
minimum pixel frequency
CLK pulse width HIGH
CLK pulse width LOW
time delay between
SHD and CLK
see Figs 3 and 4
set-up time of BLK
compared to SHD
see Figs 3 and 4
video input dynamic signal PGA code = 00
for ADC full-scale output PGA code = 255
Ntot(rms)
total noise from CDS input see Fig.8
to ADC output
(RMS value)
PGA gain = 0 dB
PGA gain = 9 dB
Ein(rms)
equivalent input noise
voltage (RMS value)
PGA gain = 24 dB
PGA gain = 9 dB
OCCD(max)
maximum offset between
CCD floating level and
CCD dark pixel level
Digital-to-analog converter (OFDOUT DAC)
VOFDOUT(p-p) additional 8-bit control
DAC (OFD) output voltage
(peak-to-peak value)
VOFDOUT(0) DC output voltage for
code 0
VOFDOUT(255) DC output voltage for
code 255
TCDAC
DAC output range
temperature coefficient
ZOFDOUT
DAC output impedance
IOFDOUT
OFD output current drive
Ri = 1 MΩ
static
MIN.
−
−
−
0.08
−
20
tbf
15
15
10
5
800
50
−
−
−
−
−100
−
−
−
−
−
−
TYP.
1
MAX. UNIT
2
ns
1
2
ns
24
−
dB
0.10
0.12 dB
±0.5
±0.9 LSB
−
−
MHz
−
−
MHz
−
−
ns
−
−
ns
−
−
ns
−
−
ns
−
−
mV
−
−
mV
1.2
−
LSB
2.0
−
LSB
95
−
µV
135
−
µV
−
+100 mV
1.0
−
V
AGND
−
V
AGND + 1.0 −
V
250
−
ppm/°C
2 000
−
−
Ω
100 µA
2000 May 01
9