LT1509 查看數據表（PDF） - Linear Technology

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LT1509

Power Factor and PWM Controller

Linear Technology 

LT1509

APPLICATIONS INFORMATION

line current reaches the secondary limit, the comparator

takes over control and hysteresis may occur causing

audible noise.

Overvoltage Protection (PFC Section)

Because of the slow loop response necessary for power

factor correction, output overshoot can occur following a

sudden load reduction or removal. To protect downstream

components, the LT1509 provides an overvoltage com-

parator which senses the output voltage and quickly

reduces the line current demand. Referring back to Figure

1, VOUT is 382V and during normal operation, since no

current flows in R3, 7.5V appears at both the VSENSE and

OVP pins. When VOUT overshoots its preset value, the

overcurrent from R1 will flow through R2 as well as R3.

The voltage amplifier feedback will keep VSENSE at 7.5V.

Therefore, the equivalent AC resistance seen by the OVP

pin is R2 in parallel with R3 or 10k. With these values and

the overvoltage comparator trip level internally set at

1.05VREF, the comparator trips when VOUT overshoots

10%. Overvoltage trip level is given by:

( ) (%)VOUT = 5%

R2 + R3

R3

For additional protection, the OVP pin can be connected

to VOUT through an independent resistor divider (see

Figure 7). This ensures overvoltage protection during

safety agency abnormal testing conditions, such as

opening R1 or shorting R2.

The output of the multiplier looks like a high impedance

current source. In the current loop, offset line current is

determined by multiplier offset current and input offset

voltage of the current error amplifier. A – 4mV current

amplifier VOS translates to 27mA line current and 6.7W

input power for 250VAC line if a 0.15Ω sense resistor is

used. Under a no-load condition or when the load power

is less than the offset output power, the offset line current

could slowly charge the output to an overvoltage level.

This is because the best the overvoltage comparator can

do is to reduce the multiplier output current to zero.

Unfortunately, this does not guarantee zero output current

if the current amplifier has offset. To regulate VOUT under

VOUT

R1

1M

R4

1.05M R2

20k

R5

20k

0.047µF

0.47µF

330k

VSENSE –

VAOUT

+

ERROR

AMP

OVP

–

LT1509

+

1.05VREF

OVERVOLTAGE

COMPARATOR

VOUT = 382V

OVERVOLTAGE = 420V

1509 • F07

Figure 7

this condition, the amplifier M1 (see Block Diagram)

becomes active. When VAOUT reduces to 2.2V, M1 sup-

plies up to 7µA of current to the resistor at the ISENSE pin

in order to cancel a negative VOS and keep VOUT error to

within 2V.

Undervoltage Lockouts and Soft Start

The LT1509 turns on when VCC reaches 16V and remains

on until VCC falls below 10V, whereupon the chip enters the

lockout state. In the lockout state, the oscillator is off and

the VREF and gate driver pins remain low. A capacitor from

SS1 to GND1 determines the ramp-up time of the PFC

section. SS1 is released from a zero when VCC rises above

the lockout threshold. Once released, an internal 14µA

current source ramps the voltage error amplifier’s refer-

ence voltage to 7.5V. SS1 voltage then continues beyond

7.5V. A second capacitor from SS2 to GND1 determines

the start-up time from the PWM section. A PWMOK

comparator (see Block Diagram) holds SS2 low until the

OVP pin reaches 7V. This corresponds to the PFC output

voltage reaching approximately 93% of its preset voltage.

SS2 is diode coupled to the PMW comparator which is

connected to the VC pin by a second diode. Holding SS2

low at any time will disable PWM output. Once released,

the 14µA current source ramps the PWM comparator

10

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