CXA2055P
(I2C BUS Logic System)
No.
Item
Symbol
Min.
Typ.
Max.
Unit
1 High level input voltage
VIH
3.0
—
5.0
V
2 Low level input voltage
VIL
0
—
1.5
V
Low level output voltage
3
VOL
0
—
0.4
V
SDA, during current inflow of 3 mA
4 Maximum clock frequency
fSCL
0
—
100
kHz
5 Minimum waiting time for data change
tBUF
4.7
—
—
µs
Minimum waiting time for
6
data transfer start
tHD ; STA
4.0
—
—
µs
7 Low level clock pulse width
tLOW
4.7
—
—
µs
8 High level clock pulse width
Minimum waiting time for
9
start preparation
10 Minimum data hold time
tHIGH
4.0
—
—
µs
tSU ; STA
4.7
—
—
µs
tHD ; DAT
5
—
—
µs
11 Minimum data preparation time
tSU ; DAT
250
—
—
ns
12 Rise time
tR
—
—
1000
ns
13 Fall time
Minimum waiting time for stop
14
preparation
tF
—
—
300
ns
tSU ; STO
4.0
—
—
µs
I2C BUS Control Signal
1 SDA
tBUF
tR
2 SCL
P
S
tLOW
tHD;STA
tF
tHD;STA
tHD;DAT tHIGH
tSU;DAT tSU;STA Sr
tSU;STO
P
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