AD744T 查看數據表（PDF） - Analog Devices

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AD744T

Precision, 500 ns Settling BiFET Op Amp

Analog Devices 

AD744

Figure 10. Open-Loop Gain and

Phase Margin vs. Frequency

CCOMP = 0 pF

Figure 11. Open Loop Gain and

Phase Margin vs. Frequency

CCOMP = 25 pF

Figure 12. Open-Loop Gain vs.

Supply Voltage

Figure 13. Common-Mode and

Power Supply Rejection vs.

Frequency

Figure 14. Large Signal Frequency

Response

Figure 15. Output Swing and Error

vs. Settling Time

Figure 16. Total Harmonic Distortion

vs. Frequency, Circuit of Figure 20

(G = 10)

Figure 17. Input Noise Voltage

Spectral Density

Figure 18. Slew Rate vs. Input

Error Signal

REV. C

–5–

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