SY89429V(1998) 查看數據表（PDF） - Micrel
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SY89429V Datasheet PDF : 9 Pages
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Micrel
ClockWorks™
SY89429V
PIN DESCRIPTIONS
INPUTS
OUTPUTS
XTAL1, XTAL2
FOUT, FOUT
These pins form an oscillator when connected to an external These differential positive-referenced ECL signals (PECL)
crystal. The crystal is series resonant.
are the output of the synthesizer.
S_LOAD
This TTL pin loads the configuration latches with the contents
of the shift registers. The latches will be transparent when this
signal is HIGH; thus, the register data must be stable on the
HIGH-to-LOW transition of S_LOAD for proper operation.
TEST
The function of this TTL output is determined by the serial
configuration bits T[2:0].
POWER
S_DATA
VCC1
This TTL pin is the input to the serial configuration shift This is the positive supply for the chip and is normally connected
registers.
to +3.3V or +5.0V.
S_CLOCK
This TTL pin clocks the serial configuration shift registers. On
the rising edge of this signal, data from S_DATA is sampled.
P_LOAD
This TTL pin loads the configuration latches with the contents
of the parallel inputs. The latches will be transparent when this
signal is LOW; thus, the parallel data must be stable on the
LOW-to-HIGH transition of P_LOAD for proper operation.
M[8:0]
These TTL pins are used to configure the PLL loop divider.
They are sampled on the LOW-to-HIGH transition of P_LOAD.
M[8] is the MSB, M[0] is the LSB. The binary count on the M
pins equates to the divide-by value for the PLL.
N[1:0]
These TTL pins are used to configure the output divider
modulus. They are sampled on the LOW-to-HIGH transition
of P_LOAD.
VCC_OUT
This is the positive reference for the PECL outputs, FOUT and
FOUT. It is constrained to be less than or equal to VCC1.
VCC_QUIET
This is the positive supply for the PLL and should be as noise-
free as possible for low-jitter operation.
GND
These pins are the negative supply for the chip and are
normally all connected to ground.
OTHER
LOOP_FILTER
This is an analog I/O pin that provides the loop filter for the
PLL.
LOOP_REF
This is an analog I/O pin that provides a reference voltage for
the PLL.
N[1:0]
00
01
10
11
Output Division
2
4
8
16
3
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