RC5054AM 查看數據表（PDF） - Fairchild Semiconductor

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RC5054AM

Programmable Synchronous DC-DC Converter Controller for Low Voltage Microprocessors

Fairchild Semiconductor 

PRODUCT SPECIFICATION

Typical Application

+12V

PGOOD

SS

OVP

VCC

MONITOR AND

PROTECTION

RT

OSC

VID0

VID1

RC5054

VID2

D/A

VID3

VID4

FB

-

+

+

-

COMP

VSEN

OCSET

EN

BOOT

UGATE

PHASE

VIN = +5V

LGATE

PGND

GND

+VOUT

RC5054A

Applications Discussion

Layout Considerations

As in any high frequency switching converter, layout is very

important. Switching current from one power device to another

can generate voltage transients across the impedances of the

interconnecting bond wires and circuit traces. These intercon-

necting impedances should be minimized by using wide, short

printed circuit traces. The critical components should be

located as close together as possible, using ground plane

construction or single point grounding.

Figure 3 shows the critical power components of the converter.

To minimize the voltage overshoot the interconnecting wires

indicated by heavy lines should be part of ground or power

plane in a printed circuit board The components shown in

Figure 3 should be located as close together as possible. Please

note that the capacitors CIN and CO each represent numerous

physical capacitors. Locate the RC5054A within 3 inches of

the MOSFETs, Q1 and Q2. The circuit traces for the MOSFETs’

gate and source connections from the RC5054A must be

sized to handle up to 1A peak current.

VIN

RC5054A

UGATE

PHASE

LGATE

PGND

Q1

LO

VOUT

Q2

D2

CIN CO

Figure 4 shows the circuit traces that require additional

layout consideration. Use single point and ground plane

construction for the circuits shown. Minimize any leakage

current paths on the SS PIN and locate the capacitor, CSS

close to the SS pin because the internal current source is only

10µA. Provide local VCC decoupling between VCC and

GND pins. Locate the capacitor, CBOOT as close as practical

to the BOOT and PHASE pins.

RC5054A

SS

BOOT

D1

CBOOT

PHASE

VCC +12V

+VIN

Q1 LO

VOUT

Q2 CO

CSS

GND

CVCC

Figure 4. Printed Circuit Board

Small Signal Layout Guidelines

Feedback Compensation

Figure 5 highlights the voltage-mode control loop for a

synchronous-rectified buck converter. The output voltage

(VOUT) is regulated to the Reference voltage level. The error

amplifier (Error Amp) output (VE/A) is compared with the

oscillator (OSC) triangular wave to provide a pulse-width

modulated (PWM) wave with an amplitude of VIN at the

PHASE node. The PWM wave is smoothed by the output

filter (LO and CO).

RETURN

Figure 3. Printed Circuit Board

Power and Ground Planes or Islands

7

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