TSH11
EVALUATION CIRCUIT
50Ω
Input
1kΩ
+5V
10 µF
10nF
10nF
10 µF
-5V 1kΩ
50Ω
Output
CF
PRINTED CIRCUIT LAYOUT
As for any high frequency device, a few rules must
be observed when designing the PCB to get the best
performances from your this speed op amp.
From the most to the least important points :
• Each power supply lead has to be bypassed
to ground with a 10nF ceramic capacitor very
close to the device and a 10µF tantalum ca-
pacitor.
• To provide low inductance and low resistance
common return, use a ground plane or com-
mon point return for power and signal.
• All leads must be wide and as short as possi-
ble especially for op amp inputs. This is in
order to decrease parasitic capacitance and
inductance.
• Use small resistor values to decrease time
constant with parasitic capacitance.
• Choose component sizes as small as possible
(SMD).
• On output, decrease capacitor load so as to
avoid circuit stability being degraded which
may cause oscillation. One can also add a
serial resistor in order to minimise its influ-
ence.
• One can add in parallel with feedback resistor
a few pF ceramic capacitor CF adjusted to
optimize the settling time.
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