Philips Semiconductors
74HC158
Quad 2-input multiplexer; inverting
E input
VM
nY output
tPHL
VM
tPLH
tTHL
tTLH
001aab864
VM = 0.5 × VI.
Fig 7. Waveforms showing the enable input (E) to output (nY) propagation delays and the
output transition times
PULSE
VI
GENERATOR
VCC
VO
D.U.T.
RT
CL
mna101
Fig 8.
Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
Load circuitry for switching times
Table 9:
Supply
VCC
2.0 V
4.5 V
6.0 V
5.0 V
Test data
Input
VI
VCC
VCC
VCC
VCC
tr, tf
6 ns
6 ns
6 ns
6 ns
Load
CL
50 pF
50 pF
50 pF
15 pF
9397 750 13805
Product data sheet
Rev. 03 — 12 November 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11 of 16