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DM74LS298M

Quad 2-Port Register Multiplexer with Storage

Fairchild Semiconductor 

March 1998

DM74LS298

Quad 2-Port Register Multiplexer with Storage

General Description

The ’LS298 is a quad 2-port register. It is the logical equiva-

lent of a quad 2-input multiplexer followed by a quad 4-bit

edge-triggered register. A Common Select input selects be-

tween two 4-bit input ports (data sources). The selected data

is transferred to the output register synchronous with the

HIGH-to-LOW transition of the Clock input.

Features

n Select from two data sources

n Fully edge-triggered operation

n Typical power dissipation of 65 mW

Connection Diagram

Dual-In-Line Package

Logic Symbol

DS009826-1

Order Number DM54LS298J, DM54LS298W,

DM74LS298M or DM74LS298N

See Package Number J16A, N16E or W16A

VCC = Pin 16

GND = Pin 8

Pin

Names

S

CP

I0a, I0d

I1a, I1d

Qa, Qd

Description

Common Select Inputs

Clock Pulse Input (Active Falling Edge)

Source 0 Data Inputs

Source 1 Data Inputs

Flip-Flip Outputs

DS009826-2

© 1998 Fairchild Semiconductor Corporation DS009826

www.fairchildsemi.com

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