74F125 查看數據表（PDF） - Philips Electronics
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74F125 Datasheet PDF : 10 Pages
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Philips Semiconductors
Quad buffers (3-State)
Product specification
74F125, 74F126
FEATURE
• High impedance NPN base inputs for reduced loading
(20µA in High and Low states)
TYPE
74F125
74F126
TYPICAL
PROPAGATION
DELAY
5.0ns
5.0ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
23mA
26mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
14-pin plastic DIP N74F125N, N74F126N
14-pin plastic SO N74F125D, N74F126D
PKG DWG #
SOT27-1
SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
D0–D3
Data inputs
1.0/0.033
OE0–OE3
Output Enable inputs (active Low), 74F125
1.0/0.033
OE0–OE3
Output Enable inputs (active High), 74F126
1.0/0.033
Q0–Q3
Data outputs
750/106.7
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE HIGH/LOW
20µA/20µA
20µA/20µA
20µA/20µA
15mA/64mA
PIN CONFIGURATIONS
74F125
OE0 1
D0 2
Q0 3
OE1 4
D1 5
Q1 6
GND 7
14 VCC
13 OE3
12 D3
11 Q3
10 OE2
9 D2
8 Q2
SF00117
74F126
OE0 1
D0 2
Q0 3
OE1 4
D1 5
Q1 6
GND 7
14 VCC
13 OE3
12 D3
11 Q3
10 OE2
9 D2
8 Q2
SF00118
LOGIC SYMBOLS
74F125
2 5 9 12
74F126
2 5 9 12
D0 D1 D2 D3
1
OE0
4
OE1
10
OE2
13
OE3
Q0 Q0 Q1 Q1
D0 D1 D2 D3
1
OE0
4
OE1
10
OE2
13
OE3
Q0 Q0 Q1 Q1
VCC = Pin 14
GND = Pin 7
3 6 8 11
SF00119
VCC = Pin 14
GND = Pin 7
3 6 8 11
SF00120
March 28, 1989
2
853–0341 96146
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