MC74AC175D 查看數據表（PDF） - ON Semiconductor

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MC74AC175D

Quad D Flip−Flop With Master Reset

ON Semiconductor 

MC74AC175, MC74ACT175

TRUTH TABLE

Inputs

Outputs

MR

CP

D

Qn

Qn

L

X

X

L

H

H

H

H

L

H

L

L

H

H

L

X

Qn

Qn

NOTE:

H = HIGH Voltage Level,

L = LOW Voltage Level

X = Immaterial

= LOW−to−HIGH Transition of Clock

D0 D1 D2 D3

CP

MR

Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3

Figure 2. Logic Symbol

MR CP D3

D2

D1

D0

DQ

CP Q

CD

DQ

CP Q

CD

DQ

CP Q

CD

DQ

CP Q

CD

Q3 Q3

Q2 Q2

Q1 Q1

NOTE: This diagram is provided only for the understanding of logic operations

and should not be used to estimate propagation delays.

Figure 3. Logic Diagram

Q0 Q0

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC

VIN

VOUT

IIN

IOUT

ICC

Tstg

DC Supply Voltage (Referenced to GND)

DC Input Voltage (Referenced to GND)

DC Output Voltage (Referenced to GND)

DC Input Current, per Pin

DC Output Sink/Source Current, per Pin

DC VCC or GND Current per Output Pin

Storage Temperature

−0.5 to +7.0

V

−0.5 to VCC + 0.5

V

−0.5 to VCC + 0.5

V

± 20

mA

± 50

mA

± 50

mA

−65 to +150

°C

*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-

mended Operating Conditions.

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