MM74C175N 查看數據表（PDF） - Fairchild Semiconductor
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MM74C175N Datasheet PDF : 6 Pages
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AC Electrical Characteristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tpd
Propagation Delay Time to
VCC = 5V
a Logical “0” or Logical “1” from
VCC = 10V
Clock to Q or Q
190
300
ns
75
110
ns
tpd
tpd
tS
tH
tW
tW
tr
tf
fMAX
CIN
Propagation Delay Time to a
Logical “0” from Clear to Q
Propagation Delay Time to a
Logical “1” from Clear to Q
Time Prior to Clock Pulse that
Data Must be Present
Time After Clock Pulse that
Data Must be Held
Minimum Clock Pulse Width
Minimum Clear Pulse Width
Maximum Clock Rise Time
Maximum Clock Fall Time
Maximum Clock Frequency
Input Capacitance
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
VCC = 5.0V
VCC = 10V
VCC = 5.0V
VCC = 10V
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
Clear Input (Note 3)
Any Other Input
180
300
ns
70
110
ns
230
400
ns
90
150
ns
100
45
ns
40
16
ns
0
−11
ns
0
−4
ns
130
250
ns
45
100
ns
120
250
ns
45
100
ns
15
450
µs
5.0
125
µs
15
50
µs
5.0
50
µs
2.0
3.5
MHz
5.0
10
MHz
10
pF
5.0
pF
CPD
Power Dissipation Capacitance
Per Package (Note 4)
Note 2: AC Parameters are guaranteed by DC correlated testing.
130
pF
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note
AN-90.
Switching Time Waveforms
CMOS to CMOS
www.fairchildsemi.com
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