CMX469A 查看數據表（PDF） - CML Microsystems Plc
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CMX469A Datasheet PDF : 16 Pages
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1200/2400/4800 Baud FFSK/MSK Modem
1.3 Signal List
CMX469A
D3
E2
P6
Signal
CMX469A
Description
Pin
Pin
Pin
No.
No.
No.
Name
Type
1
1
1
CLOCK/XTAL I/P The input to the on-chip inverter, for use with
either a 1.008MHz or a 4.032MHz Xtal or an
external clock. Clock frequency selection is by
means of the CLOCK RATE pin. This affects the
operational data rate of the device. Operation of
any CML microcircuit without a Xtal or clock
input may cause device damage.
2
2
2
XTALN
O/P The output of the on-chip inverter.
3
3
3
Tx SYNC O/P O/P A squarewave, produced on-chip, to
synchronize the input of logic data and
transmission of the FFSK/MSK signal.
4
5
5
Tx SIGNAL O/P When the transmitter is enabled, this pin outputs
O/P
the FFSK/MSK signal. With the transmitter
disabled, this pin is set to a high-impedance
state.
5
7
6
Tx DATA I/P I/P The serial logic data to be transmitted is input to
this pin.
6
8
7
Tx ENABLEN I/P A logic ‘0’ will enable the transmitter. A logic ‘1’ at
this input will put the transmitter into powersave
whilst forcing Tx SYNC OUTPUT to a logic ‘1’
and Tx SIGNAL OUTPUT to a high-impedance
state. This pin is internally pulled to VDD.
7
9
8
BANDPASS O/P The output of the Rx Bandpass Filter. This output
O/P
impedance is typically 10kΩ and may require
buffering prior to use.
8
10
9
Rx ENABLE I/P The control of the Rx function
9
11
10
VBIAS
BI The output of the on-chip analogue bias circuitry.
Held internally at VDD/2, this pin should be
decoupled to VSS by a capacitor (C2). This bias
voltage is maintained under all powersave
conditions.
10
12
11
VSS
PWR Negative supply rail (GND).
11
13
12 UNCLOCKED O/P The recovered asynchronous serial data output
DATA O/P
from the receiver.
12
14
13
CLOCKED O/P The recovered synchronous serial data output
DATA O/P
from the receiver. Data is latched out by the
recovered clock, available at the Rx SYNC O/P.
© 2001 Consumer Microcircuits Limited
5
D/469A/2
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