HS0-9008RH-Q(1999) 查看數據表（PDF） - Intersil
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HS0-9008RH-Q Datasheet PDF : 5 Pages
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HS-9008RH
Pin Descriptions
SBDIP/
CE1
FLATPACK
PACKAGE PIN
NAME
DESCRIPTION
0
8
B1
(LSB) Output Data Bits
1
9
B2
Output Data Bits
X
10
B3
Output Data Bits
11
B4
Output Data Bits
18
B5
Output Data Bits
19
B6
Output Data Bits
20
B7
Output Data Bits
21
B8
(MSB) Output Data Bits
22
OF
Overflow
16, 26, 28
2, 4, 15
13
VSSD
VDDD
CE2
Digital Ground
Digital Supply
Three-State Output Enable
12
CE1
Three-State Output Enable
6
27
5, 17, 25
3
VREF-
VIN
VSSA
CLK
Negative Reference Input
Analog Signal In
Analog Ground
Clock Input
1
1/2 R Reference Midpoint
24
7, 14, 23
VREF+
VDDA
Positive Reference Input
Analog Supply
TRUTH TABLE
CE2
B1 - B8
1
Valid
1
Three-State
0
Three-State
OF
Valid
Valid
Three-State
2
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