OP179(1999) 查看數據表（PDF） - Analog Devices
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OP179 Datasheet PDF : 16 Pages
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OP179/OP279
In order to achieve rail-to-rail output behavior, the OP179/OP279
design employs a complementary common-emitter (or gmRL)
output stage (Q15-Q16), as illustrated in Figure 23. These
amplifiers provide output current until they are forced into
saturation which occurs at approximately 50 mV from either
supply rail. Thus, their saturation voltage is the limit on the
maximum output voltage swing in the OP179/OP279. The
output stage also exhibits voltage gain, by virtue of the use of
common-emitter amplifiers; and, as a result, the voltage gain of
the output stage (thus, the open-loop gain of the device) exhib-
its a strong dependence to the total load resistance at the output
of the OP179/OP279 as illustrated in Figure 7.
VPOS
I1
Q3
105⍀
Q7 I3
Q4
Q8
Q1
150⍀
Q11
Q2
Q5
Q12
Q9
I2
Q6
Q10 I4
105⍀
Q13
Q15
VOUT
Q16
Q14
VNEG
Figure 23. OP179/OP279 Equivalent Output Circuit
Input Overvoltage Protection
As with any semiconductor device, whenever the condition
exists for the input to exceed either supply voltage, the device’s
input overvoltage characteristic must be considered. When an
overvoltage occurs, the amplifier could be damaged, depending
on the magnitude of the applied voltage and the magnitude of
the fault current. Figure 24 illustrates the input overvoltage
characteristic of the OP179/OP279. This graph was generated
with the power supplies at ground and a curve tracer connected
to the input. As can be seen, when the input voltage exceeds
either supply by more than 0.6 V, internal pn-junctions ener-
gize, which allows current to flow from the input to the supplies.
As illustrated in the simplified equivalent input circuit (Figure
22), the OP179/OP279 does not have any internal current limit-
ing resistors, so fault currents can quickly rise to damaging
levels.
This input current is not inherently damaging to the device as
long as it is limited to 5 mA or less. For the OP179/OP279,
once the input voltage exceeds the supply by more than 0.6 V,
the input current quickly exceeds 5 mA. If this condition con-
tinues to exist, an external series resistor should be added. The
size of the resistor is calculated by dividing the maximum over-
voltage by 5 mA. For example, if the input voltage could reach
100 V, the external resistor should be (100 V/5 mA) = 20 kΩ.
This resistance should be placed in series with either or both
inputs if they are exposed to an overvoltage. Again, in order to
ensure optimum dc and ac performance, it is important to bal-
ance source impedance levels. For more information on general
overvoltage characteristics of amplifiers refer to the 1993 Seminar
Applications Guide, available from the Analog Devices Literature
Center.
5
4
3
2
1
0
–1
–2
–3
–4
–5
–2.0
–1.0
0
1.0
2.0
INPUT VOLTAGE – V
Figure 24. OP179/OP279 Input Overvoltage Characteristic
Output Phase Reversal
Some operational amplifiers designed for single supply opera-
tion exhibit an output voltage phase reversal when their inputs
are driven beyond their useful common-mode range. Typically
for single-supply bipolar op amps, the negative supply deter-
mines the lower limit of their common-mode range. With these
devices, external clamping diodes, with the anode connected to
ground and the cathode to the inputs, input signal excursions
are prevented from exceeding the device’s negative supply (i.e.,
GND), preventing a condition that could cause the output
voltage to change phase. JFET input amplifiers may also
exhibit phase reversal and, if so, a series input resistor is usually
required to prevent it.
The OP179/OP279 is free from reasonable input voltage range
restrictions provided that input voltages no greater than the
supply voltages are applied. Although the device’s output will
not change phase, large currents can flow through the input
protection diodes, shown in Figure 22. Therefore, the tech-
nique recommended in the Input Overvoltage Protection sec-
tion should be applied in those applications where the
likelihood of input voltages exceeding the supply voltages is
possible.
Capacitive Load Drive
The OP179/OP279 has excellent capacitive load driving capa-
bilities. It can drive up to 10 nF directly as the performance
graph titled Small Signal Overshoot vs. Load Capacitance (Fig-
ure 18) shows. However, even though the device is stable, a
capacitive load does not come without a penalty in bandwidth.
As shown in Figure 25, the bandwidth is reduced to under 1 MHz
for loads greater than 3 nF. A “snubber” network on the out-
put won’t increase the bandwidth, but it does significantly re-
duce the amount of overshoot for a given capacitive load. A
snubber consists of a series R-C network (RS, CS), as shown in
Figure 26, connected from the output of the device to ground.
This network operates in parallel with the load capacitor, CL, to
provide phase lag compensation. The actual value of the resis-
tor and capacitor is best determined empirically.
REV. F
–7–
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