GLT6400M08SLI-85FC 查看數據表（PDF） - G-Link Technology

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GLT6400M08SLI-85FC

Ultra Low Power 512k x 8 CMOS SRAM

G-Link Technology  

G-LINK

GLT6400M08

Ultra Low Power 512k x 8 CMOS SRAM

Aug 2001(Rev.3.0)

Features :

Description :

∗ Low-power consumption.

The GLT6400M08 is a low power CMOS Static

-active: 30mA at 120ns.

RAM organized as 524,288 x 8 bits. Easy memory

-stand by :

expansion is provided by an active LOW CE1 an

20 µA (CMOS input / output)

5 µA (CMOS input / output, SL)

active LOW OE , and Tri-state I/O’s. This device has

∗ Single +2.3 to 2.7V power supply.

∗ Equal access and cycle time.

∗ 85/120 ns access time.

∗ 1.0V data retention mode.

an automatic power-down mode feature when

deselected.

Writing to the device is accomplished by taking

chip Enable 1 ( CE1 ) with Write Enable ( WE ) LOW.

∗ TTL compatible, tri-state input/output. Reading from the device is performed by taking Chip

∗ Automatic power-down when deselected. Enable 1 ( CE1 ) with Output Enable ( OE ) LOW

∗ Industrial grade (-40°C ~ 85°C)

while Write Enable ( WE ) and Chip Enable 2 (CE2)

availabel.

is HIGH. The I/O pins are placed in a high-impedance

∗ Package available: sTSOP and SOP. state when the device is deselected : the outputs are

disabled during a write cycle.

The GLT6400M08 comes with a 1V data retention

feature and Lower Standby Power. The

GLT6400M08 is available in a 32-pin sTSOP and

SOP packages.

Function Block Diagram :

INPUT BUFFER

I/O7

Cell

Array

I/O1

COLUMN DECODER

Column Address

CONTROL

CIRCUIT

OE

WE

CE1

CE2

G-Link Technology Corporation

2701 Northwestern Parkway

Santa Clara, CA 95051, U.S.A.

-1-

G-Link Technology Corporation, Taiwan

6F No. 24-2, Industry E. RD. IV, Science Based

Industrial Park, Hsin Chu, Taiwan.

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