AD1891JP 查看數據表（PDF） - Analog Devices
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AD1891JP Datasheet PDF : 20 Pages
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AD1890/AD1891–SPECIFICATIONS
TEST CONDITIONS UNLESS OTHERWISE NOTED
Supply Voltage
+5.0
Ambient Temperature
25
MCLK
20
Load Capacitance
100
V
°C
MHz
pF
All minimums and maximums tested except as noted.
PERFORMANCE (Guaranteed over 0°C ≤ TA ≤ 70°C, VDD = 5.0 V ± 10%, 8 MHz ≤ MCLK ≤ 20 MHz)
Min
AD1890 Dynamic Range (20 Hz to 20 kHz, –60 dB Input)†
120
AD1891 Dynamic Range (20 Hz to 20 kHz, –60 dB Input)†
96
Total Harmonic Distortion + Noise†
AD1890 and AD1891 (20 Hz to 20 kHz, Full-Scale Input,
FSOUT/FSIN Between 0.5 and 2.0)
AD1890 (1 kHz Full-Scale Input, FSOUT/FSIN Between 0.7 and 1.4)
AD1890 (10 kHz Full-Scale Input, FSOUT/FSIN Between 0.7 and 1.4)
AD1891 (1 kHz Full-Scale Input, FSOUT/FSIN Between 0.7 and 1.4)
AD1891 (10 kHz Full-Scale Input, FSOUT/FSIN Between 0.7 and 1.4)
Interchannel Phase Deviation†
Input and Output Sample Clock Jitter†
10
(For ≤ 1 dB Degradation in THD+N with 10 kHz Full-Scale Input, Slow-Settling Mode)
DIGITAL INPUTS (Guaranteed over 0°C ≤ TA ≤ 70°C, VDD = 5.0 V ± 10%, 8 MHz ≤ MCLK ≤ 20 MHz)
Min
VIH
2.2
VIL
IIH @ VIH = +5 V
IIL @ VIL = 0 V
VOH @ IOH = –4 mA
3.6
VOL @ IOL = 4 mA
Input Capacitance†
DIGITAL TIMING (Guaranteed over 0°C ≤ TA ≤ 70°C, VDD = 5.0 V ± 10%, 8 MHz ≤ MCLK ≤ 20 MHz)
Min
tMCLK
MCLK Period
50
fMCLK
MCLK Frequency (1/tMCLK)
8
tMPWL
MCLK LO Pulse Width
20
tMPWH
MCLK HI Pulse Width
20
fLRI
LR_I Frequency with 20 MHz MCLK†
10
tRPWL
RESET LO Pulse Width
100
tRS
RESET Setup to MCLK Falling
15
tBCLK
BCLK_I/O Period†
80
fBCLK
BCLK_I/O Frequency (l/tBCLK)†
tBPWL
BCLK_I/O LO Pulse Width
40
tBPWH
BCLK_I/O HI Pulse Width
40
tWSI
WCLK_I Setup to BCLK_I
15
tWSO
WCLK_O Setup to BCLK_O
30
tLRSI
LR_I Setup to BCLK_I
15
tLRSO
LR_O Setup to BCLK_O
30
tDS
Data Setup to BCLK_I
0
tDH
Data Hold from BCLK_I
25
tDPD
Data Propagation Delay from BCLK_O
tDOH
Data Output Hold from BCLK_O
5
Max
–94
–106
–100
–96
–95
0
Max
0. 8
4
4
0.4
15
Max
125
20
70
12.5
40
Units
dB
dB
dB
dB
dB
dB
dB
dB
Degrees
ns
Units
V
V
µA
µA
V
V
pF
Units
ns
MHz
ns
ns
kHz
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
–2–
REV. 0
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