LTC1596-1ACN 查看數據表（PDF） - Linear Technology
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LTC1596-1ACN Datasheet PDF : 12 Pages
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TRUTH TABLES
Table 1. LTC1596/LTC1596-1 Input Register
CONTROL INPUTS
STB1 STB2 STB3 STB4
010
0
10
00
0
001
1XXX
X1XX
XX0X
XXX1
Input Register and SRO Operation
Serial Data Bit on SRI Loaded into Input
Register, MSB First
Data Bit or SRI Appears on SRO Pin
After 16 Clocked Bits
No Input Register Operation
No SRO Operation
LTC1595/LTC1596/LTC1596-1
Table 2. LTC1596/LTC1596-1 DAC Register
CONTROL INPUTS
CLR LD1 LD2
0XX
11X
1X1
100
DAC Register Operation
Reset DAC Register and Input Register to
All 0s (LTC1596) or to Midscale (LTC1596-1)
(Asynchronous Operation)
No DAC Register Operation
Load DAC Register with the Contents of Input
Register
BLOCK DIAGRA (LTC1595)
VREF 1
56k
56k
56k
56k
56k
56k
56k
56k
56k
112k
112k
112k 112k 7k
2 RFB
VDD 8
LD 5
DECODER
D15
D14
(MSB)
LOAD
D13
D12
DAC REGISTER
D11 • • •
D0
(LSB)
3 OUT1
4 GND
CLK 7
CLK
INPUT 16-BIT SHIFT REGISTER
WU
W
TI I G DIAGRA (LTC1595)
tDS
tDH
CLK INPUT
PREVIOUS
D15
SRI
WORD
MSB
D14
LD
tCL
tCH
tSRI
D1
IN
6 SRI
1595 BD
D0
LSB
tASB
tLD
1595 TD
7
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