M41T80(2002) 查看數據表（PDF） - STMicroelectronics

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M41T80
(Rev.:2002)

SERIAL ACCESS RTC WITH ALARMS

STMicroelectronics 

M41T80

Figure 6. Serial Bus Data Transfer Sequence

DATA LINE

STABLE

DATA VALID

CLOCK

DATA

START

CONDITION

CHANGE OF

DATA ALLOWED

Figure 7. Acknowledgement Sequence

START

SCL FROM

MASTER

1

2

DATA OUTPUT

BY TRANSMITTER

MSB

DATA OUTPUT

BY RECEIVER

STOP

CONDITION

AI00587

CLOCK PULSE FOR

ACKNOWLEDGEMENT

8

9

LSB

AI00601

8/20

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