NT128S64VH4A0GM0-75B 查看數據表（PDF） - Nanya Technology
零件编号
产品描述 (功能)
生产厂家
NT128S64VH4A0GM0-75B
Nanya Technology
NT128S64VH4A0GM0-75B Datasheet PDF : 12 Pages
| |||
NT128S64VH4A0GM
128MB : 16M x 64
SDRAM SODIMM
Operating, Standby, and Refresh Currents (TA =0 to 70 °C , VDD =3.3 ± 0.3V)
Parameter
Symbol
Test condition
Speed
Unit
- 7K - 75B - 8B
1 bank operation , tRC = tRC(mim), tCK = min
Operating current
ICC1
Active-Precharge Command cycling
without burst operation
520
480
460
mA
Precharge
standby current
in power-down mode
ICC2P
ICC2PS
Precharge
standby current in non
power-down mode
ICC2N
ICC2NS
No Operating current
( Active state : 4 bank)
ICC3P
ICC3N
Operating current
( Burst mode )
ICC4
CKE0 ≤ VIL (max), tCK = min,
S0 = VIH (min)
CKE0 ≤ VIL (max), tCK =oo,
S0 = VIH (min)
CKE0 ≥ VIH (min), tCK = min
S0 = VIH (min)
CKE0 ≥ VIH (min), tCK =oo,
S0 = VIH (min)
CKE0 ≤ VIL (max), tCK =min.
S0 = VIH (min) , (Power Down Mode)
CKE0 ≥ VIH (min), tCK =min
S0 = VIH (min)
tCK =min , Read/ Write command cycling,
Multiple banks active, gapless data, BL=4
8
mA
8
mA
120
120
80
mA
32
32
32
mA
24
24
24
mA
240
240
240
mA
480
480
360
mA
Auto(CBR)
refresh current
ICC5
tCK =min, CBR command cycling
760
760
680
mA
Self refresh current
ICC6
CKE0 ≤ 0.2V
12
mA
Serial PD Device
Standby Current
ISB
VIN = GND or VDD
30
µA
1. These parameters depend on the cycle rate and are measured with the cycle determined by the minimum value of t CK and t RC . Input
signals are changed up to three times during t RC (min).
2. The specified values are obtained with the output open.
3. Input signals are changed once during three clock cycles.
4. Input signals are stable.
5. Active standby current will be higher if Clock Suspend is entered during a Burst Read cycle (add 1mA per DQ).
6. Input signals are changed once during tCK(min) .
7. VDD =3.3V
Note
1, 2
3
4
5
3
2, 6
7
PRELIMINARY 08 /2001
6
© NANYA TECHNOLOGY CORP.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
Share Link: