EVAL-AD7863CB 查看數據表（PDF） - Analog Devices

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EVAL-AD7863CB

Simultaneous Sampling Dual 175 kSPS 14-Bit ADC

Analog Devices 

AD7863

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

DB12 1

28 DB13

DB11 2

27 AGND

DB10

DB9

DB8

DB7

DGND

CONVST

3

26 VB1

4

25 VA1

5

24 VDD

6 AD7863 23 BUSY

7 TOP VIEW 22 RD

8 (Not to Scale) 21 CS

DB6 9

20 A0

DB5 10

19 VREF

DB4 11

18 VA2

DB3 12

DB2 13

17 VB2

16 AGND

DB1 14

15 DB0

Figure 4. Pin Configuration

Table 4. Pin Function Descriptions

Pin

No.

Mnemonic Description

1 to 6 DB12 to DB7 Data Bit 12 to Data Bit 7. Three-state TTL outputs.

7

DGND

Digital Ground. Ground reference for digital circuitry.

8

CONVST

Convert Start Input. Logic input. A high-to-low transition on this input puts both track/holds into their hold mode

and starts conversion on both channels.

9 to 15 DB6 to DB0 Data Bit 6 to Data Bit 0. Three-state TTL outputs.

16

AGND

Analog Ground. Ground reference for mux, track/hold, reference, and DAC circuitry.

17

VB2

Input Number 2 of Channel B. Analog input voltage ranges of ±10 V (AD7863-10), ±2.5 V (AD7863-3), and 0 V to

2.5 V (AD7863-2).

18

VA2

Input Number 2 of Channel A. Analog input voltage ranges of ±10 V (AD7863-10), ±2.5 V (AD7863-3), and 0 V to

2.5 V (AD7863-2).

19

VREF

Reference Input/Output. This pin is connected to the internal reference through a series resistor and is the output

reference source for the analog-to-digital converter. The nominal reference voltage is 2.5 V, and this appears at the pin.

20

A0

21

CS

Multiplexer Select. This input is used in conjunction with CONVST to determine on which pair of channels the

conversion is to be performed. If A0 is low when the conversion is initiated, then channels VA1 and VA2 are

selected. If A0 is high when the conversion is initiated, channels VB1 and VB2 are selected.

Chip Select Input. Active low logic input. The device is selected when this input is active.

22

RD

Read Input. Active low logic input. This input is used in conjunction with CS low to enable the data outputs and

read a conversion result from the AD7863.

23

BUSY

Busy Output. The busy output is triggered high by the falling edge of CONVST and remains high until conversion

is completed.

24

VDD

25

VA1

Analog and Digital Positive Supply Voltage, 5.0 V ± 5%.

Input Number 1 of Channel A. Analog input voltage ranges of ±10 V (AD7863-10), ±2.5 V (AD7863-3), and 0 V to

2.5 V (AD7863-2).

26

VB1

Input Number 1 of Channel B. Analog input voltage ranges of ±10 V (AD7863-10), ±2.5 V (AD7863-3), and 0 V to

2.5 V (AD7863-2).

27

AGND

Analog Ground. Ground reference for mux, track/hold, reference, and DAC circuitry.

28

DB13

Data Bit 13 (MSB). Three-state TTL output. Output coding is twos complement for the AD7863-10 and AD7863-3.

Output coding is straight (natural) binary for the AD7863-2.

Rev. B | Page 7 of 24

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