M39432 查看數據表（PDF） - STMicroelectronics

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M39432

Single Chip 4 Mbit Flash Memory and 256 Kbit Parallel EEPROM

STMicroelectronics 

M39432

Table 7. Summary of the Use of Status Bits

Operation

Address

DQ7 (Data

Polling Bit)

DQ6 (Toggle Bit)

DQ5 (Program

Error Bit)

DQ3 (Erase

Time-Out Bit)

Program (Flash)

or

Any address

DQ7

Toggling

0

X

Erase (EEPROM)

Program Error

(Flash)

Any address in

the Flash block

DQ7

Toggling

1

X

Flash Block Erase

Any address in

the Flash block

01

Toggling 2

0

1

Sector Erase

Sector address to

be erased

01

Toggling 2

0

1

Sector Erase

Sector address to

before Time-Out be erased

01

Toggling 2

0

0

Erase Suspend

Any byte in the

sector in erase

mode

Other sector

addresses

Invalid data on DQ7-DQ0

DQ6 toggles for 15 µs, then behaves as for a standard Read operaion

Erase Error

Sector address

01

Toggling 2

1

1

Note: 1. If all the sectors to be erased are protected, DQ7 is reset to 0 for about 100 µs, then returns to the state it was in for the previously

addressed byte. No erasure is performed.

2. If all the sectors to be erased are protected, DQ6 is reset to 0 for about 100 µs, then returns to the state it was in for the previously

addressed byte. No erasure is performed.

Figure 6. EEPROM SDP-Enable Flowcharts

Page Write

Timing

Write AAh in

Address 5555h

Write 55h in

Address 2AAAh

Write A0h in

Address 5555h

SDP is set

Page Write

Timing

SDP

Set

SDP

not Set

Write AAh in

Address 5555h

Write 55h in

Address 2AAAh

Write A0h in

Address 5555h

Write Data to

be Written in

any Address

SDP ENABLE ALGORITHM

Write

in Memory

Write Data

and

SDP Set

after tWC

Write

is enabled

AI01698C

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