LC72E32 查看數據表（PDF） - SANYO -> Panasonic
零件编号
产品描述 (功能)
生产厂家
LC72E32 Datasheet PDF : 15 Pages
| |||
Pin Functions
Pin
Pin No.
LC72E32
Function
I/O
Low threshold type dedicated input port
PA0
35
These pins can be used, for example, for key data acquisition.
PA1
34
Built-in pull-down resistors can be specified as an option. This
Input
PA2
33
option is in 4-pin units, and cannot be specified for individual
PA3
32
pins.
Input through these pins is disabled in BACKUP mode.
PB0
30
PB1
29
Dedicated output ports
PB2
28
Since the output transistor impedances are unbalanced
PB3
27
CMOS, these pins can be effectively used for functions such
as key scan timing. These pins go to the output high
PC0
26
impedance state in BACKUP mode.
PC1
25
These pins go to the low level during a reset, i.e., when the
PC2
24
RES pin is low.
PC3
23
Output
PD0
22
Dedicated output port
PD1
21
These are normal CMOS outputs. These pins go to the output
high impedance state in BACKUP mode.
PD2
20
These pins go to the low level during a reset, i.e., when the
PD3
19
RES pin is low.
I/O port
These pins are switched between input and output as follows.
PE0
18
Once an input instruction (IN, TPT, or TPF) is executed, these
PE1
17
pins latch in the input mode. Once an output instruction (OUT,
SPB, or RPB) is executed, they latch in the output mode.
PE2
16
These pins go to the input mode during a reset, i.e., when the
PE3
15
RES pin is low.
In BACKUP mode these pins go to the input mode with input
disabled.
I/O
I/O port
These pins are switched between input and output by the
PF0
14
FPC instruction.
PF1
13
The I/O states of this port can be specified for individual pins.
PF2
12
These pins go to the input mode during a reset, i.e., when the
PF3
11
RES pin is low.
In BACKUP mode these pins go to the input mode with input
disabled.
PG0
PG1
PG2
PG3
6
5
Dedicated input port
Input through these pins is disabled in BACKUP mode.
4
3
Input
I/O circuit type
EPROM mode
function
Data I/O
PE0: D0
PE1: D1
PE2: D2
PE3: D3
PF0: D4
PF1: D5
PF2: D6
PF3: D7
EPROM control
signal inputs
PG0: CE
PG1: O E
Continued on next page.
No. 4741-5/15
Share Link: 