VES1993 查看數據表（PDF） - Philips Electronics

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VES1993

Single Chip Satellite Channel Receiver

Philips Electronics 

Philips Semiconductors

Single Chip Satellite Channel Receiver

Product specification

VES1993

FUNCTIONAL DESCRIPTION (Con’t)

½ FRAME SYNCHRONIZATION AND DEINTERLEAVING

The Viterbi decoder provides errors which occur in bursts. The length of some error bursts may exceed that

which can be reliably corrected by the Reed-Solomon decoder. The implemented de-interleaving is a

convolutional one of depth 12 for DVB and 13 for DSS. The first operation consists in synchronizing the de-

interleaver. This is accomplished by detecting α consecutive sync Words (or sync ) which are present as the first

byte of each packet.

Next, the RAM memory associated with the de-interleaver fills up and the first deinterleaved bytes are provided

to the input of the Reed-Solomon decoder. The state machine of the de-interleaver goes to the control phase

which counts β consecutive missed sync Words (or sync ) before declaring the system desynchronized and

going back to the sync. phase. α and β are programmable through the I2C interface.

When the inverted sync word is detected at the input of the de-interleaver (π ambiguity at the output of the Viterbi

decoder), the bytes provided to the Reed-Solomon decoder are inverted at the output of the de-interleaver.

½ REED-SOLOMON DECODER

The Reed-Solomon decoder decodes the symbol stream from the de-interleaver according to the (N=204 for

DVB and N=146 for DSS) shortened Reed-Solomon code. Synchronization to Reed-Solomon code is defined

over the finite Galois field GF (28). The field generator polynomial is given by :

15

G(x) = (x + i )

i=0

This Reed-Solomon decoder corrects up to eight erroneous symbols in each block. When the correction

capability of the decoder is exceeded, the block is not changed and is provided as it has been entered. In this

case the flag UNCOR is set and the MSB of the second byte in the MPEG2 frame is forced to one (TEI :

Transport Error Indicator in DVB-S).The correction capability of the RS decoder can be inhibited.

• DESCRAMBLER (DVB-S)

In order to comply with energy dispersal requirements of radio transmission regulations and to ensure adequate

binary transitions, the MPEG2 frames are scrambled at the encoder side. Dual operation is achieved at the

output of the Reed-Solomon decoder using the same scrambler/descrambler. The polynomial for the pseudo

random binary sequence (PRBS generator is 1 + x14 + x15). The PRBS registers are initialized at the start of

every eight transport packets. To provide an initialization signal for the descrambler, the MPEG2 sync byte of the

first transport packet is inverted from 4716 to B816. When detected, the descrambler is loaded with the initial

sequence "100101010000000". The descrambler can be inhibited. Before being provided, the inverted sync

pattern B816 is reinverted in order to get the original MPEG2 sync word 4716.

• INTERFACE

The VES 1993 integrates an I2C interface in slave mode. This I2C interface fulfills the Philips component I2C bus

specification.

1999 Jan 01

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