BTS712N1(2004) 查看數據表（PDF） - Infineon Technologies
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BTS712N1 Datasheet PDF : 15 Pages
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BTS712N1
Truth Table
Channel 1 and 2
Channel 3 and 4
(equivalent to channel 1 and 2)
Chip 1
Chip 2
IN1 IN2 OUT1 OUT2
IN3 IN4 OUT3 OUT4
ST1/2
ST3/4
ST1/2
ST3/4
BTS 711L1 BTS 712N1
Normal operation
L
L
L
L
H
H
L
H
L
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
Open load
Channel 1 (3) L
L
Z
L
H(L14))
L
L
H
Z
H
H
H
H
X
H
X
L
H
Channel 2 (4) L
L
L
Z
H(L14))
L
H
L
H
Z
H
H
Short circuit to Vbb
X
H
X
Channel 1 (3) L
L
H
L
H
H
H
X
H
Channel 2 (4) L
L
L
H
L
H
L
L15)
L15)
H
H
H
X
H(L16))
H
H
L15)
L15)
H
L
H
H
H
H
X
H
X
H
H(L16))
H
Overtemperature
both channel
L
L
L
L
H
H
X
H
L
L
L
L
H
X
L
L
L
L
Channel 1 (3) L
X
L
X
H
H
H
X
L
X
L
L
Channel 2 (4) X
L
X
L
H
H
X
H
X
L
L
L
Undervoltage/ Overvoltage
X
X
L
L
H
H
L = "Low" Level
X = don't care
Z = high impedance, potential depends on external circuit
H = "High" Level
Status signal valid after the time delay shown in the timing diagrams
Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and
outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4
have to be configured as a 'Wired OR' function with a single pull-up resistor.
14) With additional external pull up resistor
15) An external short of output to Vbb in the off state causes an internal current from output to ground. If RGND is
used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
16) Low resistance to Vbb may be detected by no-load-detection
Semiconductor Group
7
2004-Mar-11
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