VSC6511RC 查看數據表（PDF） - Vitesse Semiconductor
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VSC6511RC Datasheet PDF : 22 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
VSC6511
SMPTE 292M Serializer, Deserialzer, and
Deserializer/Reclocker
The output swing of the VSC6511 is controlled through the ISETx pins or a VREF input. By connecting an
1.5kΩ +/-1% resistor, between VSS and ISETx the output swing will be controlled to within 800mV +/-10%.
An optional bandpass voltage reference may be used to further tighten the output swings by accurately driv-
ing the VREF input. If the VREF input is not used, it should be bypassed to ground with a combination of
0.001µF/0.1µF/1.0µF capacitors to ensure the internal reference node is not affected by external noise. These
bypass capacitors must be mounted as close to the device pins as possible.
Configuration Modes
The MODE[1:0] inputs configure the VSC6511 into its different modes of operation. Table 1 summarizes the
different signals and circuits in the VSC6511 that change function in the different modes.
Table 1: Mode Configuration Features: Serializer Mode
Signal/Circuit
MODE1
MODE0
D[19:0] Data Bus
SDO0/SDO1 Serial Outputs
RCLK Output
CRU Bypass Mux
SDI Serial Input
CRC
LOCK Output
1.001 Output
FRAME Output
LINE Output
HANC Output
Deserializer Mode
HIGH
HIGH
20-BIT OUTPUT
NOT USED, DISABLED
RECOVERED CLOCK
FROM CRU
NOT ACTIVE
ACTIVE
CRC is an error output
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Deserializer/Reclocker
Mode
LOW
HIGH
20-BIT OUTPUT
SOURCE IS CRU
OUTPUT OR SDI/SDI
RECOVERED CLOCK
FROM CRU
CRU OUTPUT GOES TO
SDO0/SDO1
ACTIVE
CRC is an error output
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Serializer Mode
LOW
LOW
20-BIT INPUT
SOURCE IS SERIALIZER
BUFFERED REFCLK
CRU NOT ACTIVE
IGNORED
Enables CRC Generator
DISABLED LOW
DISABLED LOW
DISABLED LOW
DISABLED LOW
DISABLED LOW
G52311-0, Rev 2.1
6/25/01
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
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