TQ8105S 查看數據表（PDF） - TriQuint Semiconductor

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TQ8105S

SONET/SDH Transceivers

TriQuint Semiconductor 

TQ8105/TQ8106

PRELIMINARY DATA SHEET

The combination of a thermally enhanced, 100-pin

JEDEC, metric, plastic package, the low-power

dissipation of the device, and the wide case-

temperature range permits operation without a heat

sink in most designs.

The TQ8106 uses the same pinout as the TQ8105 and

is compatible with it.

The TQ8105/TQ8106 provides comprehensive,

integrated, loopback functionality and enhanced line

and reference clock diagnostics required of SONET/

SDH systems, minimizing additional external circuitry.

Figure 1. TQ8105 Block Diagram

TQ8105/TQ8106 diagnostics include:

• Loss of Reference clock detector (LOR) output to

indicate that the PLL Reference Clock is not toggling

• Lock Indicator (RLOCK), which permits monitoring

of the receiver clock frequency, flagging when the

frequency drifts beyond approximately 500 ppm

• Loss of Signal (LOS) detector output to indicate that

the incoming data stream has no data transitions in

128-bit periods

• ECL/PECL input (NSOL) to allow LOS from an O/E

module to force the data stream to all zeroes,

eliminating the need for external glue logic.

CKSRC(2:0)

TxBC

PH(1:0)

MXD(7:0)

LBM(1:0)

DXD(7:0)

NOE

NRESET

RxBC

FRPWR

LOS

CLRLOS

3

Clock

Phase

2

B

Y

A

Clock/8

PLL Clock

Synthesizer

B

Y

A

Ext. Clk

8

Parallel

to

Serial

2

Clock

Data

8 Hold 11

Register

Serial

to

Parallel

Clock

Data

Loop

Back &

Retime

Block

Clock

Data

/8

Clock

Data

2

ECL/ 2

PECL

I/O

2

Block

2

2

Framer

LOS

Detect

Freq.

Lock

Detect

TQ8105

REFCKT

REFCKE

TXCK

TXD

DVPP

VPP

VNN

RXCK

RXD

NSOL

OOF

DXSYNC

RLOCK

2

For additional information and latest specifications, see our website: www.triquint.com

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