SPT5400SCP 查看數據表（PDF） - Signal Processing Technologies
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SPT5400SCP Datasheet PDF : 8 Pages
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PIN ASSIGNMENTS
VOUTB
VOUTA
VDD
REFAB
AGNDAB
LDAB
LDCD
CS
WR
A2
A1
6
7
17
18
1 44
Top View
40
39
29
28
VOUTG
VOUTH
VDD
REFGH
AGNDGH
GND
LDGH
LDEF
D0
D1
D2
PIN FUNCTIONS
Name
CLR
AGNDCD
REFCD
VSS
VOUTD
VOUTC
VOUTB
VOUTA
Function
Clear input (active low). Driving this asynchronous
input low sets the content of all latches to 1000hex.
All DAC outputs are reset to AGNDxx.
Analog ground for DAC C and DAC D.
Reference voltage input for DAC C and DAC C.
Bypass to AGNDCD with a 0.1 to 1 µF capacitor.
Negative power supply, –5 V (two pins). Connect
both pins to the supply voltage. Bypass each pin to
the system analog ground with a 0.1 µF capacitor.
DAC D output voltage.
DAC C output voltage.
DAC B output voltage.
DAC A output voltage.
Name
VDD
REFAB
AGNDAB
LDAB
LDCD
CS
WR
A2
A1
A0
D12–D0
LDEF
LDGH
GND
AGNDGH
REFGH
VOUTH
VOUTG
VOUTF
VOUTE
REFEF
AGNDEF
Function
Positive power supply, +5 V (two pins). Connect
both pins to the supply voltage. Bypass each pin to
the system analog ground with a 0.1 µF capacitor.
Reference voltage input for DAC A and DAC B.
Bypass to AGNDAB with a 0.1 to 1 µF capacitor.
Analog ground for DAC A and DAC B.
Load input (active low). Driving this asynchronous
input low transfers the contents of the input latches
A and B to the respective DAC latches.
Load input (active low). Driving this asynchronous
input low transfers the contents of the input latches
C and D to the respective DAC latches.
Chip select (active low).
Write input (active low). WR along with CS load data
into the DAC input latch selected by A0–A2.
Address bit 2.
Address bit 1.
Address bit 0.
Data bits 12–0. (D0 = LSB)
Load input (active low). Driving this asynchronous
input low transfers the contents of the input latches
E and F to the respective DAC latches.
Load input (active low). Driving this asynchronous
input low transfers the contents of the input latches
G and H to the respective DAC latches.
Digital ground.
Analog ground for DAC G and DAC H.
Reference voltage input for DAC G and DAC H.
Bypass to AGNDGH with a 0.1 to 1 µF capacitor.
DAC H output voltage.
DAC G output voltage.
DAC F output voltage.
DAC E output voltage.
Reference voltage input for DAC E and DAC F.
Bypass to AGNDEF with a 0.1 to 1 µF capacitor.
Analog ground for DAC E and DAC F.
ORDERING INFORMATION
PART NUMBER
SPT5400SCP
TEMPERATURE RANGE
0 to +70 °C
PACKAGE
44L PLCC
Signal Processing Technologies, Inc. reserves the right to change products and specifications without notice. Permission is hereby
expressly granted to copy this literature for informational purposes only. Copying this material for any other use is strictly prohibited.
WARNING – LIFE SUPPORT APPLICATIONS POLICY – SPT products should not be used within Life Support Systems without the
specific written consent of SPT. A Life Support System is a product or system intended to support or sustain life which, if it fails, can
be reasonably expected to result in significant personal injury or death.
Signal Processing Technologies believes that ultrasonic cleaning of its products may damage the wire bonding, leading to device
failure. It is therefore not recommended, and exposure of a device to such a process will void the product warranty.
SPT
SPT5400
8
5/15/00
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