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IW4502B 查看數據表(PDF) - Integral Corp.

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IW4502B Datasheet PDF : 5 Pages
1 2 3 4 5
TECHNICAL DATA
Strobed Hex Inverter/Buffer
High-Voltage Silicon-Gate CMOS
IW4502B
The IW4502B consists of six inverter/buffers with 3-state outputs.
A logic “1” on the OUTPUT ENABLE input produces a high
impedance state in all six outputs. This feature permits common busing
of the outputs, thus simplifying system design. A logic “1” on the
DIRECTION input switches all six outputs to logic “0” if the
OUTPUT ENABLE input is a logic “0”.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4502BN Plastic
IW4502BD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 16=VCC
PIN 8= GND
FUNCTION TABLE
Inputs
Output Direction
Enable
L
L
L
L
L
H
H
X
Z = high impedance
X = don’t care
Output
AY
LH
HL
XL
XZ
147

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