VSC9112SB 查看數據表（PDF） - Vitesse Semiconductor

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VSC9112SB

STS-48c Physical Layer Packet/ATM Over SONET/SDH Device

Vitesse Semiconductor 

Datasheet

VSC9112

VITESSE

SEMICONDUCTOR CORPORATION

STS-48c Physical Layer

Packet/ATM Over SONET/SDH Device

• The J0, E1, F1, and D1-D3 bytes can be extracted from the Section overhead and inserted into bytes on

the special purpose ports of the ROAP.

Receive Line Overhead Processor (RLOP)

• The Line Remote Defect Indication (RDI-L) and Line Alarm Indication Signal (AIS-L) alarms carried in

the K2 byte are extracted and filtered. The filter constants are programmable.

• Line BIP-384 errors carried in the B2 bytes are detected and accumulated. Both individual and block

mode accumulation of B2 errors are supported.

• Line REI error indications carried in the M1 byte are accumulated. Both individual and block mode accu-

mulation of M1 error indications are supported.

• The Synchronization Status carried in the S1 byte is extracted and filtered. Unstable and mismatch alarms

are supported. The filter constants are programmable.

• The Automatic Protection Switching (APS) bytes, K1 and K2, are extracted and filtered. Unstable alarm

is supported. The filter constants are programmable.

• It is possible to extract the entire Line overhead through the ROAP.

• The D4-D12, S1, E2, K1-K2 bytes can be extracted from the Line overhead and inserted into bytes on the

special purpose ports of the ROAP.

Receive Path Overhead Processor (RPOP)

• The H1 and H2 pointer bytes are detected and interpreted according to ANSI T1.105 and ITU-T G.707.

The mechanism is programmable to support both SONET and SDH. Path Alarm Indication Signal (AIS-

P) and Loss of Pointer (LOP-P) alarm declarations are provided. Several pointer functions are also pro-

vided for diagnostic purposes.

• The H1 and H2 pointer bytes are monitored for Concatenation Indication (CI). Loss of Pointer (LOPX)

and AIS (AISX) alarm declarations are provided.

• Path BIP-8 errors carried in the B3 byte are detected and accumulated. Both individual and block mode

accumulation of B3 errors are supported.

• Path REI error indications carried in the G1 byte are detected and accumulated. Up to 64000 individual

errors can be detected per second. Both individual and block mode accumulation of Path REI error indi-

cations are supported.

• The Path RDI carried in the G1 byte is detected and programmable.

• The Signal Label carried in the C2 byte is detected, alarmed and is programmable.

Receive Packet Processor (RPP)

• The byte value used to identify the HDLC Flag Sequence is programmable.

• The detection and discarding of invalid frames are programmable.

• The expected Control Escape byte value and the Octet Destuffing Masking byte are programmable.

G52210-0, Rev. 4.3

3/30/00

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

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