CXK5B81020J-12 查看數據表（PDF） - Sony Semiconductor
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CXK5B81020J-12 Datasheet PDF : 9 Pages
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CXK5B81020J/TM
• Read cycle
-12
Item
Symbol
Unit
Min. Max.
Read cycle time
tRC
12
—
ns
Address access time
tAA
—
12
ns
Chip enable access time
tCO
—
12
ns
Output enable to output valid
tOE
—
6
ns
Output data hold time
tOH
3
—
ns
Chip enable to output in low Z (CE)
tLZ
3
—
ns
Output enable to output in low Z (OE) tOLZ∗
0
—
ns
Chip disable to output in high Z (CE)
tHZ∗
0
6
ns
Output disable to output in high Z (OE) tOHZ∗
0
6
ns
∗ Transition is measured ±200mV from steady voltage with specified loading in Fig. 1 1-(2).
This parameter is sampled and is not 100% tested.
• Write cycle
-12
Item
Symbol
Unit
Min. Max.
Write cycle time
tWC
12
—
ns
Address valid to end of write
tAW
10
—
ns
Chip enable to end of write
tCW
10
—
ns
Data valid to end of write
tDW
8
—
ns
Data hold from end of write
tDH
0
—
ns
Write pulse width
tWP
10
—
ns
Address set up time
tAS
0
—
ns
Write recovery time
tWR
0
—
ns
Output active from lend of write
tOW∗
4
—
ns
Write to output in high Z
tWHZ∗
0
6
ns
∗ Transition is measured ±200mV from steady voltage with specified loading in Fig. 1 1-(2).
This parameter is sampled and is not 100% tested.
–4–
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