AD7450 查看數據表（PDF） - Analog Devices
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AD7450 Datasheet PDF : 24 Pages
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AD7450
PRELIMINARY TECHNICAL DATA
TPC 13 shows the change in Zero Code Error versus the
Reference Voltage for VDD = 5V and 3.3V.
1
VDD = 5 V
0
Fs = 1MSPS
-1
VDD = 3.3 V
-2
Fs = 833kSPS
-3
-4
-5
-6
-7
-8
-9
0.25
0.75
1.25
1.75
2.25
2.5
VREF
TPC 13. Change in Zero Code Error vs Reference Voltage
VDD = 5V and 3.3 V*
TPC 14 shows a histogram plot for 10000 conversions of
a dc input using the AD7450 with VDD = 5V. Both ana-
log inputs were set to VREF, which is the center of the
code transition.
TPC 15 shows a histogram plot for 10000 conversions of
a dc input for VDD of 3V. As in TPC 14, both inputs are
set to VREF. Both plots indicate good noise performance as
the majority of codes appear in one output bin.
10000
9839 Codes
9000
8000
7000
6000
5000
4000
3000
2000
1000
71 Codes
0
90 Codes
2044
2045
2046
2047
2048
2049
CODE
TPC 15. Histogram of 10000 conversions of a DC Input with
VDD = 3V
TPC 16 shows the Effective Number of Bits (ENOB)
versus the Reference Voltage for VDD 5V and 3.3V. Note
that the AD7450 has an ENOB of greater than 8-bits typi-
cally when VREF = 100mV.
10000
9000
8000
10000 Codes
12
VDD = 5V
11
Fs = 1MSPS
7000
10
6000
5000
9
4000
3000
8
VDD = 3.3V
Fs = 833kSPS
2000
7
1000
0
2044
2045
2046
2047
2048
2049
6
CODE
0
0.5
1
1.5
2
2.5
VREF
TPC 14. Histogram of 10000 conversions of a DC Input with
VDD = 5V
TPC 16. Change in ENOB vs Reference Voltage
VDD = 5V and 3.3 V*
*See Reference Section.
–10–
REV. PrJ
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