AD7450AR 查看數據表（PDF） - Analog Devices

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AD7450AR

Differential Input, 1MSPS, 12-Bit ADC in µSO-8 and S0-8

Analog Devices 

PRELIMINARY TECHNICAL DATA

AD7450 - SPECIFICATIONS1

( VDD = 2.7V to 3.3V, fSCLK = 15MHz, fS = 833kHz, VREF = 1.25 V;

VDD = 4.75V to 5.25V, fSCLK = 18MHz, fS = 1MHz, VREF = 2.5 V;

VCM 3 = VREF; TA = TMIN to TMAX, unless otherwise noted.)

Parameter

A Version1 B Version1 Units

Test Conditions/Comments

DYNAMIC PERFORMANCE

Signal to (Noise + Distortion) Ratio

(SINAD)2

Total Harmonic Distortion (THD)2

Peak Harmonic or Spurious Noise2

Intermodulation Distortion (IMD)2

Second Order Terms

Third Order Terms

Aperture Delay3

Aperture Jitter3

Full Power Bandwidth3

Common Mode Rejection Ratio

(CMRR)2

70

-80

-80

-78

-78

10

50

20

2.5

TBD

70 dB min

-80 dB max

-80 dB max

-78

-78

10

50

20

2.5

TBD

dB typ

dB typ

ns typ

ps typ

MHz typ

MHz typ

dB

FIN = 300kHz Sine Wave,

fSAMPLE= 833kSPS, 1MSPS

@ -3 dB

@ -0.1 dB

DC ACCURACY

Resolution

12

Integral Nonlinearity (INL)2

±2

Differential Nonlinearity (DNL)2

±1

Zero Code Error2

±5

Positive Gain Error2

±5

Negative Gain Error2

±5

12 Bits

±1 LSB max

± 1 LSB max Guaranteed No Missed Codes to 12 Bits.

±5 LSB max

±5 LSB max

±5 LSB max

ANALOG INPUT

Full Scale Input Span

Absolute Input Voltage

VIN+

VIN-

DC Leakage Current

Input Capacitance

VIN+ - VIN -

VCM3 ± VREF/2

VCM3 ± VREF/2

±1

±1

20

20

5

5

Volts

Volts

Volts

µA max

pF typ

pF typ

2 x VREF4

VCM = VREF

VCM = VREF

When in Track

When in Hold

REFERENCE INPUT

VREF Input Voltage

2.55

1.256

2.5 Volts

1.25 Volts

DC Leakage Current

VREF Input Capacitance

LOGIC INPUTS

Input High Voltage, VINH

Input Low Voltage, VINL

Input Current, IIN

Input Capacitance, CIN7

LOGIC OUTPUTS

Output High Voltage, VOH

Output Low Voltage, VOL

Floating-State Leakage Current

Floating-State Output Capacitance7

Output Coding

±1

±1 µA max

15

15 pF typ

2.4

2.4 V min

0.8

0.8 V max

±1

±1 µA max

10

10 pF max

2.8

2.8

0.4

0.4

±10

±10

10

10

Two’s Complement

V min

V max

µA max

pF max

5 V supply (±1% tolerance for specified

performance)

3 V supply (±1% tolerance for specified

performance)

Typically 10 nA, VIN = 0 V or VDD

ISOURCE = 200µA

ISINK =200µA

CONVERSION RATE

Conversion Time

16

Track/Hold Acquisition Time8

275

Throughput Rate9

1

833

16 SCLK cycles 888ns with an 18MHz SCLK

1.07µs with a 15MHz SCLK

275 ns max

Sine Wave input

1

MSPS max @ VDD = 5V

833 kSPS max @ VDD = 3V

–2–

REV. PrJ

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