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WT8046N24P1 查看數據表(PDF) - Weltrend Semiconductor

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WT8046N24P1 Datasheet PDF : 25 Pages
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WT8046
Synchronous Signal Discriminator with Power Saving
Detector and Test Pattern for Green Monitor

APPLICATION INFORMATION
Name
OSCin
OSCout
Hsin
Vsin
H_OUT
V_OUT
F43.5k
F36.2k
F33k
QV
QVRC
Vss
F52k
PM1
Function
A clock generating circuit is built into the chip. So if a resonator is I
connected to OSCin/OSCout, a clock signal can be obtained
Structure
of
Terminal
Refer to OSCin pin
O
Input terminal of horizontal synchronous signal
I, TTL
compatible
Input terminal of vertical synchronous signal
I, TTL
compatible
Output pin, fixed negative polarity of original H_SYNC signal with I, TTL
same pulse
N28P8)
width
(but,
positive
for
N28P2,
N28P6,N28P7
and
compatible
Output pin, fixed negative polarity of original V_SYNC signal with O, TTL
same pulse width (but, positive for N28P2, N28P6,N28P7 and compatible
N28P8)
>43.5k then active low, <43.5k then high
O, open drain
>36.2k then active low, <36.2k then high
O, open drain
>33k then active low, <33k then high
O, open drain
Output pin, fixed positive polarity of vertical signal; pulse width O, open drain
depend upon RV & CV.
Input pin, connected to Vdd through RV & to ground through CV I
Ground
>52k then active low, <52k then high
O, open drain
Indicate in STAND-BY mode
O, open drain

Weltrend Semiconductor, Inc.
2F., No. 24, Industry E. 9th Rd.
Science-Based Industrial Park
Hsin-Chu, Taiwan, R.O.C.
Tel: 886-35-780241
Fax: 886-35-770419
10

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