FX980L7 查看數據表（PDF） - CML Microsystems Plc
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FX980L7 Datasheet PDF : 86 Pages
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TETRA Baseband Processor
1.3 Signal List (continued)
FX980
L6 Package Package
44 PLCC
#
Pin No. Pin No.
Signal
Name
Type
Description
10
AUXDAC1
O/P Auxiliary DAC channel 1
9
AUXDAC2
O/P Auxiliary DAC channel 2
8
AUXDAC3
O/P Auxiliary DAC channel 3
7
AUXDAC4
O/P Auxiliary DAC channel 4
36
35
32
33
34
6
3,21
27,40
28,39
31
5
4,13,22
BIAS1
BIAS2
VCC1
VCC2
VCC3
VDD1
VDD
VSS1
VSS2
VSSB
VSSA
VSS
BI
BI
Power
Power
Power
Power
Power
Ground
Analogue bias level. This pin should be de-
coupled to VSSB.
Analogue bias level. This pin should be de-
coupled to VSSB.
I Channel analogue positive supply rail. This
pin should be de-coupled to VSS1.
Q Channel analogue positive supply rail. This
pin should be de-coupled to VSS2.
Analogue Bias positive supply rail. Levels and
voltages are dependent upon this supply. This
pin should be de-coupled to VSSB.
Auxiliary analogue positive supply rail. This
pin should be de-coupled to VSSA.
Digital positive supply rail. This pin should be
de-coupled to VSS.
I Channel analogue negative supply rail.
Ground Q Channel analogue negative supply rail.
Ground Analogue Bias negative supply rail.
Ground Auxiliary analogue negative supply rail.
Ground Primary digital negative supply rail.
Notes: I/P = Input
O/P = Output
BI = Bi-directional
© 1997 Consumer Microcircuits Limited
5
D/980/3
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