AD75019JPZ-REEL 查看數據表（PDF） - Analog Devices
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AD75019JPZ-REEL Datasheet PDF : 4 Pages
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AD75019–SPECIFICATIONS1
(TA = +25؇C, VDD and VSS = ؎12 V, VCC = +5 V unless otherwise noted)
AD75019
Symbol
Min
Typ Max
Units
MULTIPLEXER
Input Signal Range
Switch ON Resistance, VDD and VSS = ± 12 V, VSIGNAL = ± 12 V
Switch ON Resistance, VDD and VSS = ± 5 V, VSIGNAL = ± 5 V
Switch ON Resistance Matching2, VSIGNAL = ± 12 V
Leakage Current, VSIGNAL = ± 10 V
Input/Output Capacitance
Isolation Between Any Two Channels
RS = 600 Ω, RL = 10 kΩ, VSIGNAL = 2 V p-p
fSIGNAL = 1 kHz
fSIGNAL = 20 kHz
fSIGNAL = 1 MHz
Total Harmonic Distortion
RS = 600 Ω, RL = 10 kΩ, VSIGNAL = 2 V p-p
Switch Frequency Response, –3 dB
RS = 600 Ω, RL = 10 kΩ, VSIGNAL = 2 V p-p
Propagation Delay
DIGITAL INPUTS (SIN, SCLK, PCLK)
Logic Levels (TTL Compatible)
Input Voltage, Logic “1”
Input Voltage, Logic “0”
Input Current, VIH = 5.5 V
Input Current, VIL = 0.8 V
Input Capacitance
DIGITAL OUTPUTS (SOUT)
Logic Levels (TTL Compatible)
Output Voltage, Logic “1”
Output Voltage, Logic “0”
Output Current, VOH = 2.8 V
Output Current, VOL = 0.4 V
POWER SUPPLY REQUIREMENTS
Voltage Range, Total Analog
Voltage Range, Positive Analog
Voltage Range, Negative Analog
Voltage Range, Digital
Supply Current, SCLK = 5 MHz,
VIL = 0.8 V, VIH = 2.4 V
Supply Current, Quiescent,
VIL = 0.8 V, VIH = 2.4 V
TEMPERATURE RANGE
Operating
Storage
VIN
RON
RON
∆RON
CIN
VSS – 0.5
150
300
20
2
92
69
38
20
4
VIH
2.4
VIL
0
IIH
IIL
CIN
VOH
VOL
IOH
IOL
VDD – VSS
VDD – VDGND
VSS – VDGND
VCC – VDGND
IDD, ISS
ICC
IDD, ISS
ICC
TMIN, TMAX
2.8
3.2
3.2
9.0
(VCC – 0.5)
–20.7
4.5
5
_
_
–25
–65
VDD + 0.5
V
300
Ω
500
Ω
30
Ω
10
nA
25
pF
dB
dB
dB
0.01
%
MHz
8
ns
5.5
V
0.8
V
±1
µA
±1
µA
10
pF
V
0.4
V
mA
mA
25.2
V
25.2
V
0
V
5.5
V
± 70
mA
800
µA
؎400
µA
100
µA
+85
°C
+150
°C
NOTES
1All minimum and maximum specifications are guaranteed, and specifications shown in boldface are tested on all production units at final electrical test. Results from those tests
are used to calculate outgoing quality levels.
2Switch resistance matching is measured with zero volts at each analog input and refers to the difference between the maximum and minimum values.
Specifications subject to change without notice.
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
Pin Name Description
1 PCLK Parallel Clock Input
2 SCLK Serial Clock Input
3 SIN Serial Data Input
4
VSS
Negative Analog Power Supply
5 NC No Internal Connection
6 NC No Internal Connection
7 Y15 Analog Output (or Input)
8 Y14 Analog Output (or Input)
9 Y13 Analog Output (or Input)
10 Y12 Analog Output (or Input)
11 Y11 Analog Output (or Input)
12 Y10 Analog Output (or Input)
13 Y9 Analog Output (or Input)
14 Y8
15 X0
Analog Output (or Input)
Analog Input (or Output)
16 X1
17 X2
Analog Input (or Output)
Analog Input (or Output)
18 X3
19 X4
Analog Input (or Output)
Analog Input (or Output)
20 X5
21 X6
Analog Input (or Output)
Analog Input (or Output)
22 X7 Analog Input (or Output)
Pin Name Description
23 X8 Analog Input (or Output)
24 X9 Analog Input (or Output)
25 X10 Analog Input (or Output)
26 X11 Analog Input (or Output)
27 X12 Analog Input (or Output)
28 X13 Analog Input (or Output)
29 X14 Analog Output (or Input)
30 X15 Analog Output (or Input)
31 Y0 Analog Output (or Input)
32 Y1 Analog Output (or Input)
33 Y2 Analog Output (or Input)
34 Y3
35 Y4
Analog Output (or Input)
Analog Output (or Input)
36 Y5
37 Y6
Analog Output (or Input)
Analog Output (or Input)
38 Y7 Analog Output (or Input)
39 NC No Internal Connection
40 NC No Internal Connection
41 VDD Positive Analog Power Supply
42 VCC Digital Power Supply
43 DGND Digital Ground
44 SOUT Serial Data Output: Positive True
–2–
Y15 7
Y14 8
Y13 9
Y12 10
Y11 11
Y10 12
Y9 13
Y8 14
X0 15
X1 16
X2 17
6 5 4 3 2 1 44 43 42 41 40
PIN 1
IDENTIFIER
AD75019
TOP VIEW
(Not to Scale)
39 NC
38 Y7
37 Y6
36 Y5
35 Y4
34 Y3
33 Y2
32 Y1
31 Y0
30 X15
29 X14
18 19 20 21 22 23 24 25 26 27 28
NC = NO CONNECT
REV. C
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