HEF4053BP 查看數據表（PDF） - NXP Semiconductors.
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HEF4053BP Datasheet PDF : 20 Pages
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NXP Semiconductors
HEF4053B
Triple single-pole double-throw analog switch
VDD
nYn
VDD
from decoder
and enable logic
Fig 4. Schematic diagram (one switch)
6. Pinning information
6.1 Pinning
VEE
nZ
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HEF4053B
2Y1 1
2Y0 2
16 VDD
15 2Z
3Y1 3
14 1Z
3Z 4
13 1Y1
3Y0 5
E6
12 1Y0
11 S1
VEE 7
VSS 8
10 S2
9 S3
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Fig 5. Pin configuration for SOT38-4 (DIP16) and
SOT109-1 (SO16)
HEF4053B
2Y1 1
2Y0 2
3Y1 3
3Z 4
3Y0 5
E6
VEE 7
VSS 8
16 VDD
15 2Z
14 1Z
13 1Y1
12 1Y0
11 S1
10 S2
9 S3
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Fig 6. Pin configuration for SOT403-1 (TSSOP16)
6.2 Pin description
Table 2. Pin description
Symbol
Pin
E
6
VEE
VSS
S1, S2, S3
7
8
11, 10, 9
1Y0, 2Y0, 3Y0
12, 2, 5
1Y1, 2Y1, 3Y1
13, 1, 3
1Z, 2Z, 3Z
14, 15, 4
VDD
16
Description
enable input (active LOW)
supply voltage
ground supply voltage
select input
independent input or output
independent input or output
independent output or input
supply voltage
HEF4053B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 17 November 2011
© NXP B.V. 2011. All rights reserved.
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