L9380(1998) 查看數據表（PDF） - STMicroelectronics

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L9380
(Rev.:1998)

TRIPLE HIGH-SIDE MOSFET DRIVER

STMicroelectronics 

Figure 4. Timing Characteristic.

VIN

L9380

VG

td

VS

td

VDSmin

VT

4.4V

0.4V

Toff

D98AT392

pacitor CCP of 33nF in less than 20ms up to 8V

above VS. The value of CCP depends on the input

capacitance of the external MOS and the decay

of the charge pump voltage down to that value

where no significant influence on the application

occurs.

The necessary charging time for CCP has to be

respected in the sequence of the input control sig-

nals. As a consequence the lower gate to source

voltage can cause a higher drop across the

Power-MOS and get into overload condition. In

this case the overload protection timer will start.

After the protection time the concerned channel

will be switched off. Channel 3 is not equipped

with an overload protection. The same situation

can occur due to a discharge of the storage ca-

pacitor caused by the gate short to ground. The

gate driver that is supplied from the pin CP, which

is the charge pump output, has a sink and source

current capability of 3mA. For a short-circuit of the

load (source to ground) the L9380 has no gate to

source limitation. The gate source protection must

be done externally.

Channel 1 and 2 provide drain to source voltage

sensing possibility with programmable shut-off

delay when the activation threshold was ex-

ceeded. This threshold VDSmin is set by the exter-

nal resistor RD. The bias current flowing through

this resistor is determined by the programming re-

Figure 5. Drain, source input current.

ID

IPR + IDmax

= VD

VS

IPR

0

D98AT393

ISmax IS

sistor RPR. This external resistor RPR defines also

the charge and discharge current of the timer ca-

pacitor CCT. The drain to source threshold VDSmin

and the timer shut off delay time Toff can be cal-

culated:

VDSmin = VPR (RD /RPR)

Toff = 4.4 CT RPR

5/12

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