ST16C650A(2005) 查看數據表（PDF） - Exar Corporation

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ST16C650A
(Rev.:2005)

2.90V TO 5.5V UART WITH 32-BYTE FIFO

Exar Corporation 

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REV. 5.0.1

ST16C650A

2.90V TO 5.5V UART WITH 32-BYTE FIFO

1.0 PRODUCT DESCRIPTION

The ST16C650A (650A) is a low power UART that can operate from 2.90V to 5.5V power supplies. Its inputs

are 5V tolerant to facilitate interconnection to transceiver devices of RS-232, RS-422 or RS-485. The 650A is

software compatible to the industry standard 16C550 with some additional enhanced features.

The 650A provides serial asynchronous receive data synchronization, parallel-to-serial data conversion for the

transmitter section and serial-to-parallel data conversions for receiver section. These functions are necessary

for converting the serial data stream into parallel data that is required with digital data systems.

Synchronization for the serial data stream is accomplished by adding start and stop bits to the transmitted data

to form a data character (character orientated protocol). Data integrity is ensured by attaching a parity bit to the

data character. The parity bit is checked by the receiver for any transmission bit errors. The electronic circuitry

to provide all these functions is fairly complex especially when manufactured on a single integrated silicon

chip. The ST16C650A represents such an integration with greatly enhanced features. The 650A is fabricated

with an advanced CMOS process.

The 650A supports standard 8-bit Intel or PC bus interfaces through an input selection pin (SEL input pin). The

Intel bus uses the standard read and write signals for all bus transactions. The PC bus mode associates with

the PC ISA bus and follow the industry standard PC definitions for COM 1-4 serial port addresses. The 650A

includes on-board chip select decode logic and selection for the proper interrupt request. This eliminates the

need for an external logic array device.

The 650A has 32-bytes each of transmit and receive FIFOs, automatic RTS/CTS hardware flow control with

hysteresis, automatic Xon/Xoff and special character software flow control, selectable transmit and receive

FIFO trigger levels, wireless infrared encoder and decoder (IrDA ver. 1.0), programmable baud rate generator

with a prescaler of divide by 1 or 4, and data rates up to 3.125 Mbps with a 16X sampling clock rate.

The 650A is an upward solution that provides 32 bytes of transmit and receive FIFO memory, instead of 16

bytes provided in the 16C550, or none in the 16C450. The 650A is designed to work with high speed

communication devices, that require fast data processing time. Increased performance is realized in the 650A

by the larger transmit and receive FIFOs. This allows the external processor to handle more networking tasks

within a given time. For example, the standard ST16C550 with a 16 byte FIFO, unloads 16 bytes of receive

data in 1.53 ms (This example uses a character length of 11 bits, including start/stop bits at 115.2Kbps). This

means the external CPU will have to service the receive FIFO at 1.53 ms intervals. However with the 32 byte

FIFO in the 650A, the data buffer will not require unloading/loading for 3.05 ms. This increases the service

interval giving the external CPU additional time for other applications and reducing the overall UART interrupt

servicing time. In addition, the 4 selectable levels of FIFO trigger interrupt and automatic hardware/software

flow control is uniquely provided for maximum data throughput performance especially when operating in a

multi-channel environment. The combination of the above greatly reduces the bandwidth requirement of the

external controlling CPU, increases performance, and reduces power consumption.

The rich feature set of the 650A is available through internal registers. Automatic hardware/software flow

control, selectable transmit and receive FIFO trigger levels, selectable TX and RX baud rates, infrared

encoder/decoder interface, modem interface controls, and a sleep mode are all standard features. In the PC

mode, two tri-state interrupt lines (IRQB and IRQC) and one selectable open source interrupt output (IRQA)

are available. The open source interrupt scheme allows multiple interrupts to be combined in a “wire-OR”

operation, thus reducing the number of interrupt lines in larger systems. Following a power on reset or an

external reset, the 650A is software compatible with previous generation of UARTs, 16C450, 16C550 and

ST16C580.

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