Philips Semiconductors
Very low dropout voltage/quiescent current
3.0 V voltage regulator with enable
Preliminary specification
TDA3672
CHARACTERISTICS
VP = 14.4 V; Tamb = 25 °C; measured in test circuit (see Fig.3); unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Supply voltage: pin VP
VP
supply voltage
Iq
quiescent current
Enable input: pin EN
regulator operating; note 1
3
VP = 14.4 V; IREG = 0 mA;
−
VI(EN) = 0 V
VP = 14.4 V; IREG = 0 mA;
−
VI(EN) = 5 V
5.5 V ≤ VP ≤ 22 V; IREG = 10 mA −
5.5 V ≤ VP ≤ 22 V; IREG = 50 mA −
14.4 45 V
4
15 µA
15 30 µA
0.2 0.5 mA
1.4 2.5 mA
VI(EN)
enable input voltage
II(EN)
enable input current
Regulator output: pin REG; note 2
enable off; VREG ≤ 0.8 V
enable on; VREG ≥ 2.7 V
VI(EN) = 5 V
−1 −
+1.0 V
3.0 −
18 V
−
0.3 −
µA
VREG
output voltage
VREG(drop) dropout voltage
VREG(stab)
∆VREG(line)
long-term output voltage
stability
line regulation voltage
∆VREG(load) load output regulation voltage
SVRR
supply voltage ripple rejection
IREG(crl)
ILO(rp)
current limit
output leakage current at
reverse polarity input
7.5 V ≤ VP ≤ 22 V; IREG = 0.5 mA
0.5 mA ≤ IREG ≤ 100 mA;
Tamb ≤ 125 °C
5.5 V ≤ VP ≤ 45 V; IREG = 0.5 mA;
Tamb ≤ 125 °C
VP = 2.8 V; IREG = 50 mA;
Tamb ≤ 85 °C
2.84
2.81
2.81
−
−
6.5 V ≤ VP ≤ 22 V; IREG = 0.5 mA
6.5 V ≤ VP ≤ 45 V; IREG = 0.5 mA
0.5 mA ≤ IREG ≤ 50 mA
fi = 120 Hz; Vi(ripple) = 1 V (RMS);
IREG = 0.5 mA
VREG > 2.5 V
VP = −15 V; VREG ≤ 0.3 V
−
−
−
50
0.17
−
3.0
3.0
3.0
0.18
20
1
1
10
60
0.25
1
3.16
3.19
3.19
0.3
−
30
50
50
−
−
500
V
V
V
V
mV/1000 h
mV
mV
mV
dB
A
µA
Notes
1. The regulator output will follow VP if VP < VREG + VREG(drop).
2. Limiting values as applicable for device type TDA3672AT: VP ≤ 45 V and −40 °C ≤ Tamb ≤ +125 °C.
2000 Apr 26
5