CXD2428Q 查看數據表（PDF） - Sony Semiconductor

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CXD2428Q

Video Scan Converter

Sony Semiconductor 

CXD2428Q

Description of Operation

1. CXD2428Q Control System

The operation timing of this IC is controlled by serial data.

An 8-bit address and 8-bit data are sequentially transferred from the falling edge of SCTL, and each control

data is taken in at the rising edge of SCLK up to the rising edge of SCTL.

SCLK

SCTL

SDAT

ADDRESS

Serial transfer timing

DATA

2. Control Mode

The following timing and modes are changed by control data:

Variable

H SHIFT

V SHIFT

H PHASE

V PHASE

H SZ RD

H SZ WR

LN DAT0 to 7

MD DAT0 to 7

TOP BLK

BTM BLK

LFT BLK

RGT BLK

IODAT

IOSL

TEST

Address

00H

10H

20H

30H

40H

50H

41H

51H

60 to 67H

70 to 77H

A0H

B0H

C0H

D0H

80H

E0H

90H

Function

Horizontal write start timing

Vertical write start timing

Horizontal readout start timing

Vertical readout start timing

Number of readout line dots (0 to 7 bits)

Number of readout line dots (8 to 10 bits)

Number of write line dots (0 to 7 bits)

Number of write line dots (8 to 10 bits)

Conversion mode address

Conversion mode data

Vertical blanking rise timing

Vertical blanking fall timing

Horizontal blanking rise timing

Horizontal blanking fall timing

I/O port output data∗1

OUT port select∗2

∗3

∗1 Transfer xxxx.1xxx (binary) for PAL (4:3 display) and xxxx.0xxx (binary) for the other systems.

∗2 Transfer 00 (hexadecimal).

∗3 Transfer 00 (hexadecimal).

–9–

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